Lines Matching +full:drdy +full:- +full:pin

2 # SPDX-License-Identifier: Apache-2.0
9     #include <zephyr/dt-bindings/sensor/iis2dlpc.h>
14       tap-mode = <IIS2DLPC_DT_SINGLE_DOUBLE_TAP>;
15       power-mode = <IIS2DLPC_DT_HP_MODE>;
18 include: sensor-device.yaml
21   drdy-gpios:
22     type: phandle-array
24       DRDY pin
26       This pin defaults to active high when produced by the sensor.
30   drdy-int:
35       Select DRDY pin number (1 or 2).
38       (INT1 or INT2) the drdy line is attached to. This property is not
40       configuration at power-up.
42       - 1 # drdy is generated from INT1
43       - 2 # drdy is generated from INT2
49       Range in g. Default is power-up configuration.
51       - 16 # 16g (1.952 mg/LSB)
52       - 8  #  8g (0.976 mg/LSB)
53       - 4  #  4g (0.488 mg/LSB)
54       - 2  #  2g (0.244 mg/LSB)
58   power-mode:
62       Specify the sensor power mode. Default is power-up configuration.
64       - 0 # IIS2DLPC_DT_LP_M1
65       - 1 # IIS2DLPC_DT_LP_M2
66       - 2 # IIS2DLPC_DT_LP_M3
67       - 3 # IIS2DLPC_DT_LP_M4
68       - 4 # IIS2DLPC_DT_HP_MODE
72   # tap and tap-tap configuration section
73   # All default values are selected to match the power-up values.
74   # tap and tap-tap events can be generated on INT1 only.
76   tap-mode:
80       Tap mode. Default is power-up configuration.
82       - 0 # IIS2DLPC_DT_SINGLE_TAP
83       - 1 # IIS2DLPC_DT_SINGLE_DOUBLE_TAP
87   tap-threshold:
91       Tap X/Y/Z axes threshold. Default is power-up configuration.
94       Thresholds to start the tap-event detection procedure on the X/Y/Z axes.
95       Threshold values for each axis are unsigned 5-bit corresponding
96       to a 2g acceleration full-scale range. A threshold value equal to zero
102           tap-threshold = <12>, <0>, <14>
106   tap-shock:
110       Tap shock value. Default is power-up configuration.
112       This register represents the maximum time of an over-threshold signal
116   tap-latency:
120       Tap latency. Default is power-up configuration.
122       When double-tap recognition is enabled, this register expresses the
124       double-tap event. Where 0 equals 16*1/ODR and 1LSB = 32*1/ODR.
126   tap-quiet:
130       Expected quiet time after a tap detection. Default is power-up configuration.