Lines Matching +full:pwm +full:- +full:3

2 # SPDX-License-Identifier: Apache-2.0
5   NXP S32 eMIOS PWM node for S32 SoCs. Each channel in eMIOS can be configured
6   to use for PWM operation. There are several PWM modes supported by this module,
11     - Channel 0 for mode OPWFMB
12     - Channel 1 for mode OPWMB
13     - Channel 2 for mode OPWMCB with deadtime inserted at leading edge
14     - Channel 3 for mode SAIC, use internal timebase with input filter = 2 eMIOS clock
16     emios0_pwm: pwm {
19         pwm-mode = "OPWFMB";
22         duty-cycle = <32768>;
28         master-bus = <&emios1_bus_a>;
29         pwm-mode = "OPWMB";
30         duty-cycle = <32768>;
31         phase-shift = <100>;
37         master-bus = <&emios1_bus_b>;
38         pwm-mode = "OPWMCB_LEAD_EDGE";
39         duty-cycle = <32768>;
40         dead-time = <100>;
45         channel = <3>;
46         pwm-mode = "SAIC";
48         input-filter = <2>;
53   phandle 'master-bus'. For OPWMB mode, PWM's period is master bus's period and
54   is 2 * master bus's period - 2 for OPWMCB mode. Please notice that the devicetree
56   'nxp,s32-emios' bindings.
58 compatible: "nxp,s32-emios-pwm"
60 include: [pwm-controller.yaml, base.yaml, pinctrl-device.yaml]
63   pinctrl-0:
66   pinctrl-names:
69   "#pwm-cells":
70     const: 3
72 pwm-cells:
73   - channel
75   - period
76   - flags
78 child-binding:
80     eMIOS PWM channel configuration.
86       description: eMIOS PWM channel
88     master-bus:
91         A phandle to master-bus node that will be used as external timebase
93         for PWM operation. A master bus must be used exclusively, such as if
95         master bus as a timebase for generate PWM pulse.
97     pwm-mode:
101         Select PWM mode:
102         - OPWFMB: provides waveforms with variable duty cycle and frequency,
105         - OPWMB:  generate pulses with programmable leading and trailing
107                   an external counter driven in MCB Up Mode. Changing PWM period
111         - OPWMCB: generates a center aligned PWM with dead time insertion to the
113                   an external counter driven in MCB Up Down Mode. Changing PWM period
117         - SAIC: single action input capture mode, the eMIOS captures events as soon as
121         - "OPWFMB"
122         - "OPWMB"
123         - "OPWMCB_TRAIL_EDGE"
124         - "OPWMCB_LEAD_EDGE"
125         - "SAIC"
130         Output polarity for PWM channel.
132         - "ACTIVE_LOW"
133         - "ACTIVE_HIGH"
135     duty-cycle:
138         Duty-cycle (in ticks) for PWM channel at boot time.
144         of PWM mode depends on period's master bus. Must be in range [2 ... 65535].
150     prescaler-src:
156         - "PRESCALED_CLOCK" # Clock source = eMIOS clock / (global prescaler)
157         - "MODULE_CLOCK"    # Clock source = eMIOS clock
163       enum: [1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16]
165     dead-time:
169         Dead time (in ticks) for PWM channel in OPWMCB mode.
171     phase-shift:
175         Phase Shift (in ticks) for PWM channel in OPWMB mode.
177     input-filter:
183         through the input filter. The filter latency - the difference in time between