Lines Matching +full:power +full:- +full:source

2 # SPDX-License-Identifier: Apache-2.0
6 include: [pwm-controller.yaml, base.yaml, pinctrl-device.yaml]
8 compatible: "microchip,xec-pwmbbled"
27   clock-select:
31       Clock source selection: 32 KHz is available in deep sleep.
32       - PWM_BBLED_CLK_AHB: Clock source is the PLL based AHB clock
33       - PWM_BBLED_CLK_32K: Clock source is the 32KHz domain
35       - "PWM_BBLED_CLK_32K"
36       - "PWM_BBLED_CLK_48M"
38   pinctrl-0:
41   pinctrl-names:
44   "#pwm-cells":
47   enable-low-power-32k:
51       - Main system clock (48MHz)
52       - 32KHz Core clock (32.768KHz)
54       PCR(Power, Clock and Reset) block. But 32KHz Core clock will be available to BBLED.
56       Property "enable-low-power-32k" shall be used along with 32KHz clock to blink (or) not blink
59 pwm-cells:
60   - channel
61   - period
62   - flags