Lines Matching +full:other +full:- +full:controller
2 # SPDX-License-Identifier: Apache-2.0
7 The NXP S32 pin controller is a singleton node responsible for controlling
20 #include <nxp/s32/S32K344-257BGA-pinctrl.h>
26 output-enable;
30 input-enable;
36 of a device. The 'default' state is the active state. Other states for the same
39 In addition to 'pinmux' property, each group can contain other properties such as
40 'bias-pull-up' or 'slew-rate' that will be applied to all the pins defined in
41 'pinmux' array. To enable the input buffer use 'input-enable' and to enable the
42 output buffer use 'output-enable'.
44 To link the pin configurations with UART0 device, use pinctrl-N property in the
45 device node, where 'N' is the zero-based state index (0 is the default state).
49 pinctrl-0 = <&uart0_default>;
50 pinctrl-names = "default";
56 - input and output buffers disabled
57 - internal pull not enabled
58 - slew rate "fastest"
59 - invert disabled
60 - drive strength disabled.
64 - Safe Mode Control (disabled)
65 - Pad Keeping (disabled)
66 - Input Filter (disabled).
68 compatible: "nxp,s32k3-pinctrl"
72 child-binding:
73 description: NXP S32 pin controller pin group.
74 child-binding:
75 description: NXP S32 pin controller pin configuration node.
78 - name: pincfg-node.yaml
79 property-allowlist:
80 - bias-disable
81 - bias-pull-down
82 - bias-pull-up
83 - input-enable
84 - output-enable
93 information in a 32-bit value.
95 slew-rate:
98 - "fastest"
99 - "slowest"
111 nxp,drive-strength: