Lines Matching +full:low +full:- +full:speed

3 # SPDX-License-Identifier: Apache-2.0
8     Based on pincfg-node.yaml binding.
24     pins, such as the 'bias-pull-up' property in group 2. Here is a list of
27     - bias-disable: Disable pull-up/down (default behavior, not required).
28     - bias-pull-down: Enable pull-down resistor.
29     - bias-pull-up: Enable pull-up resistor.
30     - drive-push-pull: Output driver is push-pull (default, not required).
31     - drive-open-drain: Output driver is open-drain.
32     - output-high: Set output state high when pin configured.
33     - output-low: Set output state low when pin configured.
36     - drive-strength
37     - slew-rate
44       #include <microchip/mec172x/mec172xnsz-pinctrl.dtsi>
47     and want the chip select 0 to be open-drain.
53         pinctrl-0 = < &shd_cs0_n_gpio055
58         pinctrl-names = "default";
62         drive-open-drain;
65 compatible: "microchip,xec-pinctrl"
73 child-binding:
79     - name: pincfg-node.yaml
80       property-allowlist:
81         - bias-disable
82         - bias-pull-down
83         - bias-pull-up
84         - drive-push-pull
85         - drive-open-drain
86         - low-power-enable
87         - output-disable
88         - output-enable
89         - output-high
90         - output-low
98     slew-rate:
100       default: "no-change"
102         - "no-change"
103         - "low-speed"
104         - "high-speed"
106         Pin speed. The default value of slew-rate is the SoC power-on-reset
111     drive-strength:
113       default: "no-change"
115         - "no-change"
116         - "1x"
117         - "2x"
118         - "4x"
119         - "6x"
121         Pin output drive strength for PIO and PIO-24 pin types. Default
122         is "1x" for most pins. PIO pins are 2, 4, 8, or 12 mA. PIO-24 pins
126     microchip,output-func-invert: