Lines Matching +full:bias +full:- +full:pull +full:- +full:pin +full:- +full:default

2 # SPDX-License-Identifier: Apache-2.0
5     The GD32 pin controller (AF model) is a singleton node responsible for
6     controlling pin function selection and pin properties. For example, you can
7     use this node to route USART0 RX to pin PA10 and enable the pull-up resistor
8     on the pin.
17     All device pin configurations should be placed in child nodes of the
20       /* You can put this in places like a board-pinctrl.dtsi file in
24       /* include pre-defined combinations for the SoC variant used by the board */
25       #include <dt-bindings/pinctrl/gd32f450i(g-i-k)xx-pinctrl.h>
28         /* configuration for the usart0 "default" state */
39             /* both PA10 and PA12 have pull-up enabled */
40             bias-pull-up;
52     The 'usart0_default' child node encodes the pin configurations for a
53     particular state of a device; in this case, the default (that is, active)
54     state. Similarly, 'usart0_sleep' child node encodes the pin configurations
56     is used for low power states because it disconnects the pin pull-up/down
59     As shown, pin configurations are organized in groups within each child node.
60     Each group can specify a list of pin function selections in the 'pinmux'
63     A group can also specify shared pin properties common to all the specified
64     pins, such as the 'bias-pull-up' property in group 2. Here is a list of
65     supported standard pin properties:
67     - drive-push-pull: Push-pull drive mode (default, not required).
68     - drive-open-drain: Open-drain drive mode.
69     - bias-disable: Disable pull-up/down (default, not required).
70     - bias-pull-up: Enable pull-up resistor.
71     - bias-pull-down: Enable pull-down resistor.
72     - slew-rate: Set the maximum speed (and so the slew-rate) of the output
73       signal (default: 2MHz).
75     Note that drive and bias options are mutually exclusive.
77     To link pin configurations with a device, use a pinctrl-N property for some
80        #include "board-pinctrl.dtsi"
83              pinctrl-0 = <&usart0_default>;
84              pinctrl-1 = <&usart0_sleep>;
85              pinctrl-names = "default", "sleep";
88 compatible: "gd,gd32-pinctrl-af"
90 include: gd,gd32-pinctrl-common.yaml
92 child-binding:
95   child-binding:
97       The grandchild nodes group pins that share the same pin configuration.
99       slew-rate:
101         default: "max-speed-2mhz"
103           - "max-speed-2mhz"
104           - "max-speed-25mhz"
105           - "max-speed-50mhz"
106           - "max-speed-200mhz"
108           Set the maximum speed of a pin. This setting effectively limits the
109           slew rate of the output signal. Defaults to "max-speed-2mhz", the SoC
110           default.