Lines Matching +full:enable +full:- +full:output +full:- +full:pin
2 # Copyright (c) 2021-2022, Gerson Fernando Budke
3 # SPDX-License-Identifier: Apache-2.0
8 The Atmel SAM0 pin controller is a singleton node responsible for controlling
9 pin function selection and pin properties. For example, you can use this node
10 to route SERCOM0 as UART were RX to pin PAD1 and enable the pull-up resistor
11 on the pin.
20 All device pin configurations should be placed in child nodes of the 'pinctrl'
23 /** You can put this in places like a <board>-pinctrl.dtsi file in
27 /** include pre-defined combinations for the SoC variant used by the board */
28 #include <dt-bindings/pinctrl/samr21g-pinctrl.h>
42 /* both PA5 and PA7 have pull-up enabled */
43 bias-pull-up;
48 The 'usart0_default' child node encodes the pin configurations for a
52 As shown, pin configurations are organized in groups within each child node.
53 Each group can specify a list of pin function selections in the 'pinmux'
56 A group can also specify shared pin properties common to all the specified
57 pins, such as the 'bias-pull-up' property in group 2. Here is a list of
58 supported standard pin properties:
60 - bias-pull-up: Enable pull-up resistor.
61 - bias-pull-down: Enable pull-down resistor.
62 - drive-strength: Increase sink current.
63 - input-enable: Enable input on pin.
64 - output-enable: Enable output on a pin without actively driving it.
66 To link pin configurations with a device, use a pinctrl-N property for some
69 #include "board-pinctrl.dtsi"
72 pinctrl-0 = <&usart0_default>;
73 pinctrl-names = "default";
76 compatible: "atmel,sam0-pinctrl"
81 "#address-cells":
84 "#size-cells":
88 child-binding:
91 child-binding:
93 The grandchild nodes group pins that share the same pin configuration.
96 - name: pincfg-node.yaml
97 property-allowlist:
98 - bias-pull-up
99 - bias-pull-down
100 - drive-strength
101 - input-enable
102 - output-enable
110 be defined using pre-defined macros or, alternatively, using the
113 drive-strength:
115 - 0
116 - 1
119 The drive strength controls the output driver strength of an I/O pin
120 configured as an output.
121 0: Pin drive strength is set to normal drive strength.
122 1: Pin drive strength is set to stronger drive strength.