Lines Matching full:description

4 description: NXP mcux SAI-I2S controller
23     description: tx dma channel number
28     description: rx dma channel number
32     description: tx sync mode
36     description: rx sync mode
40     description: pre divider
44     description: post-divider fraction
48     description: pll settings
53     description: Provided names of pll-clock specifiers
58     description: iomux settings
62     description: tx channel the maximum number is SOC dependent
67     description: Clock mux source for SAI root clock