Lines Matching +full:2 +full:pin
5 Ambiq GPIO provides the GPIO pin mapping for GPIO child nodes.
9 This binding provides a pin mapping to solve the limitation of the maximum
30 #gpio-cells = <2>;
38 #gpio-cells = <2>;
47 #gpio-cells = <2>;
56 #gpio-cells = <2>;
65 #gpio-cells = <2>;
76 address offset. The register address of pin described in gpio-cells can be
77 obtained by: base address + child address offset + (pin << 2). For example:
78 the address of pin 20 of gpio32_63@80 node is (0x40010000 + 0x80 + (20 << 2))
79 = 0x400100D0 and the real GPIO pin number of this pin in soc is (20 + 32)