Lines Matching +full:0 +full:x2

11     1. channel: the mux channel from 0 to <dma-channels> - 1
16                0x0: MEM to MEM
17                0x1: MEM to PERIPH
18                0x2: PERIPH to MEM
19                0x3: reserved for PERIPH to PERIPH
21                0x0: no address increment between transfers
22                0x1: increment address between transfers
24                0x0: no address increment between transfers
25                0x1: increment address between transfers
27                0x0: Byte (8 bits)
28                0x1: Half-word (16 bits)
29                0x2: Word (32 bits)
30                0x3: reserved
32                0x0: Byte (8 bits)
33                0x1: Half-word (16 bits)
34                0x2: Word (32 bits)
35                0x3: reserved
37                0x0: offset size is linked to the peripheral bus width
38                0x1: offset size is fixed to 4 (32-bit alignment)
40                0x0: low
41                0x1: medium
42                0x2: high
43                0x3: very high
56          dmas = <&dmamux1 11 7 0x20440
57                   &dmamux1 1 6 0x20480>;