Lines Matching +full:peripheral +full:- +full:to +full:- +full:memory

2 # SPDX-License-Identifier: Apache-2.0
7   The STM32 BDMA is a general-purpose direct memory access controller
9   Each channel can have up to 8 requests.
10   BDMA clients connected to the STM32 BDMA controller must use the format
11   described in the dma.txt file, using a four-cell specifier for each
12   channel: a phandle to the BDMA controller plus the following four integer cells:
13     1. channel: the bdma stream from 0 to <bdma-requests>
15     3. channel-config: A 32bit mask specifying the BDMA channel configuration
17         -bit 6-7 : Direction  (see dma.h)
18                0x0: MEM to MEM
19                0x1: MEM to PERIPH
20                0x2: PERIPH to MEM
21                0x3: reserved for PERIPH to PERIPH
22         -bit 9 : Peripheral Increment Address
25         -bit 10 : Memory Increment Address
28         -bit 11-12 : Peripheral data size
30                0x1: Half-word (16 bits)
33         -bit 13-14 : Memory data size
35                0x1: Half-word (16 bits)
38         -bit 15: Peripheral Increment Offset Size
39                0x0: offset size is linked to the peripheral bus width
40                0x1: offset size is fixed to 4 (32-bit alignment)
41         -bit 16-17 : Priority level
48      bdma1: dma-controller@58025400 {
49          compatible = "st,stm32-bdma";
52          dma-requests = <7>;
61        dma-names = "dmamux";
64 compatible: "st,stm32-bdma"
66 include: dma-controller.yaml
77     description: If the BDMA controller supports memory to memory transfer
79   dma-offset:
82       offset in the table of channels when mapping to a DMAMUX
88   "#dma-cells":
93 …rnel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/plain/Bindings/dma/st,stm32-d…
95 dma-cells:
96   - channel
97   - slot
98   - channel-config