Lines Matching full:clock

5   STM32 Reset and Clock controller node.
6   This node is in charge of system clock ('SYSCLK') source selection and controlling
9   Configuring STM32 Reset and Clock controller node:
11   System clock source should be selected amongst the clock nodes available in "clocks"
13   Core clock frequency should also be defined, using "clock-frequency" property.
15           Core clock frequency  = SYSCLK / AHB prescaler
22            clock-frequency = <DT_FREQ_M(40)>; /* = SYSCLK / AHB prescaler */
28   Specifying a gated clock:
30   To specify a gated clock, a peripheral should define a "clocks" property encoded
39   control the peripheral clock in that bus register.
41   Specifying an alternate clock source:
43   Specifying an alternate source clock could be done by adding a clock specifier to the
44   clock property:
51   In this example I2C1 device is assigned HSI as clock source.
52   It is device driver's responsibility to query and use clock source information in
57 include: [clock-controller.yaml, base.yaml]
63   "#clock-cells":
66   clock-frequency:
70       default frequency in Hz for clock output (HCLK1)
82         Common AHB1, AHB2, AHB4 prescaler. Defines actual core clock frequency
95         AHB5 prescaler. Defines actual core clock frequency (HCLK5) based on
134       When enabled, AHB5 clock is SysClock / 2.
137 clock-cells: