Lines Matching +full:hsi +full:- +full:div

2 # SPDX-License-Identifier: Apache-2.0
5   STM32 HSI Clock node description for STM32C0 devices
6   On STM32C0, HSI is a 48MHz fixed clock.
9   source. In that case, a HSI divisor (ranges from 1 to 128) can be applied:
10   SYSCLK = HSI48 / HSI DIV
12         - 1 ==> HSISYS = 48MHZ
13         - 2 ==> HSISYS = 24MHZ
14         - 4 ==> HSISYS = 12MHZ
15         - 8 ==> HSISYS = 6MHZ
16         - 16 ==> HSISYS = 3MHZ
17         - 32 ==> HSISYS = 1.5MHz
18         - 64 ==> HSISYS = 0.75MHZ
19         - 128 ==> HSISYS = 0.375MHz
21 compatible: "st,stm32c0-hsi-clock"
23 include: [fixed-clock.yaml]
26   hsi-div:
30       HSI clock divider. Configures the output HSI clock frequency (HSISYS).
32       - 1
33       - 2
34       - 4
35       - 8
36       - 16
37       - 32
38       - 64
39       - 128