Lines Matching +full:divider +full:- +full:int +full:- +full:0

2 # SPDX-License-Identifier: Apache-2.0
9     f_out = ((R + A * 2^(-16)) * f_src) / B
13     - A: nordic,frequency
14     - B: nordic,outdiv
15     - R: nordic,range (3=low, 4=mid, 5=high, 6=statichigh)
16     - f_src: Source frequency, given by clocks
18 compatible: "nordic,nrf-auxpll"
21   - base.yaml
22   - clock-controller.yaml
23   - nordic-nrf-ficr-client.yaml
35   "#clock-cells":
36     const: 0
42     type: int
45       Value used to set the fractional PLL divider ratio (can be set between
46       divider ratios 4 to 5). Valid values range from 0 to 65535.
48   nordic,out-div:
49     type: int
51       - 1
52       - 2
53       - 3
54       - 4
55       - 6
56       - 8
57       - 12
58       - 16
59     description: PLL output divider.
61   nordic,out-drive:
62     type: int
65       - 0
66       - 1
67       - 2
68       - 3
71   nordic,current-tune:
72     type: int
76   nordic,sdm-disable:
78     description: Disable sigma-delta modulator
80   nordic,dither-disable:
82     description: Disable dither in sigma-delta modulator
88       - "low"
89       - "mid"
90       - "high"
91       - "statichigh"
92     description: PLL loop divider range