Lines Matching +full:clock +full:- +full:phase

2 # SPDX-License-Identifier: Apache-2.0
4 include: [clock-controller.yaml, base.yaml]
7   LiteX Mixed Mode Clock Manager
8   Common clock driver with MMCM unit for dynamic reconfiguration
9   of up to 7 clock outputs with ability to change frequency, duty
10   cycle and phase offset
14 clock-cells:
15   - id
22   "#clock-cells":
26   clock-output-names:
28     type: string-array
30       List of strings of clock output signal names indexed
31       by the first cell in the clock specifier.
33   litex,lock-timeout:
38   litex,drdy-timeout:
43   litex,divclk-divide-min:
48   litex,divclk-divide-max:
53   litex,clkfbout-mult-min:
58   litex,clkfbout-mult-max:
63   litex,vco-freq-min:
68   litex,vco-freq-max:
73   litex,clkout-divide-min:
77       minimal clock output divider
78   litex,clkout-divide-max:
82       maximal clock output divider
83   litex,vco-margin: