Lines Matching +full:clkout +full:- +full:divider

2 # SPDX-License-Identifier: Apache-2.0
4 include: [clock-controller.yaml, base.yaml]
14 clock-cells:
15   - id
22   "#clock-cells":
26   clock-output-names:
28     type: string-array
33   litex,lock-timeout:
38   litex,drdy-timeout:
43   litex,divclk-divide-min:
47       minimal global divider
48   litex,divclk-divide-max:
52       maximal global divider
53   litex,clkfbout-mult-min:
58   litex,clkfbout-mult-max:
63   litex,vco-freq-min:
67       minimal frequency after global divider and multiplier
68   litex,vco-freq-max:
72       maximal frequency after global divider and multiplier
73   litex,clkout-divide-min:
77       minimal clock output divider
78   litex,clkout-divide-max:
82       maximal clock output divider
83   litex,vco-margin: