Lines Matching +full:input +full:- +full:negative
3 # SPDX-License-Identifier: Apache-2.0
10 "#io-channel-cells":
14 "#address-cells":
17 "#size-cells":
20 child-binding:
41 - ADC_GAIN_1_6: x 1/6
42 - ADC_GAIN_1_5: x 1/5
43 - ADC_GAIN_1_4: x 1/4
44 - ADC_GAIN_2_7: x 2/7
45 - ADC_GAIN_1_3: x 1/3
46 - ADC_GAIN_2_5: x 2/5
47 - ADC_GAIN_1_2: x 1/2
48 - ADC_GAIN_2_3: x 2/3
49 - ADC_GAIN_4_5: x 4/5
50 - ADC_GAIN_1: x 1
51 - ADC_GAIN_2: x 2
52 - ADC_GAIN_3: x 3
53 - ADC_GAIN_4: x 4
54 - ADC_GAIN_6: x 6
55 - ADC_GAIN_8: x 8
56 - ADC_GAIN_12: x 12
57 - ADC_GAIN_16: x 16
58 - ADC_GAIN_24: x 24
59 - ADC_GAIN_32: x 32
60 - ADC_GAIN_64: x 64
61 - ADC_GAIN_128: x 128
63 - "ADC_GAIN_1_6"
64 - "ADC_GAIN_1_5"
65 - "ADC_GAIN_1_4"
66 - "ADC_GAIN_2_7"
67 - "ADC_GAIN_1_3"
68 - "ADC_GAIN_2_5"
69 - "ADC_GAIN_1_2"
70 - "ADC_GAIN_2_3"
71 - "ADC_GAIN_4_5"
72 - "ADC_GAIN_1"
73 - "ADC_GAIN_2"
74 - "ADC_GAIN_3"
75 - "ADC_GAIN_4"
76 - "ADC_GAIN_6"
77 - "ADC_GAIN_8"
78 - "ADC_GAIN_12"
79 - "ADC_GAIN_16"
80 - "ADC_GAIN_24"
81 - "ADC_GAIN_32"
82 - "ADC_GAIN_64"
83 - "ADC_GAIN_128"
90 - ADC_REF_VDD_1: VDD
91 - ADC_REF_VDD_1_2: VDD/2
92 - ADC_REF_VDD_1_3: VDD/3
93 - ADC_REF_VDD_1_4: VDD/4
94 - ADC_REF_INTERNAL: Internal
95 - ADC_REF_EXTERNAL0: External, input 0
96 - ADC_REF_EXTERNAL1: External, input 1
98 - "ADC_REF_VDD_1"
99 - "ADC_REF_VDD_1_2"
100 - "ADC_REF_VDD_1_3"
101 - "ADC_REF_VDD_1_4"
102 - "ADC_REF_INTERNAL"
103 - "ADC_REF_EXTERNAL0"
104 - "ADC_REF_EXTERNAL1"
106 zephyr,vref-mv:
116 zephyr,acquisition-time:
129 When set, selects differential input mode for the channel. Otherwise,
130 single-ended mode is used unless the zephyr,input-negative property is
133 zephyr,input-positive:
136 Positive ADC input. Used only for drivers that select
139 zephyr,input-negative:
142 Negative ADC input. Used only for drivers that select
144 When specified, implies the differential input mode for the channel.
158 zephyr,current-source-pin:
159 type: uint8-array
166 zephyr,vbias-pins: