Lines Matching +full:0 +full:- +full:64
2 * Copyright 2020-2022,2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
9 #include <arm64/armv8-a.dtsi>
10 #include <zephyr/dt-bindings/clock/imx_ccm.h>
11 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
12 #include <zephyr/dt-bindings/rdc/imx_rdc.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
20 zephyr,shell-uart = &uart2;
24 #address-cells = <1>;
25 #size-cells = <0>;
27 cpu@0 {
29 compatible = "arm,cortex-a53";
30 reg = <0>;
35 compatible = "arm,cortex-a53";
41 compatible = "arm,cortex-a53";
47 compatible = "arm,cortex-a53";
54 compatible = "arm,armv8-timer";
63 interrupt-parent = <&gic>;
66 gic: interrupt-controller@38800000 {
67 compatible = "arm,gic-v3", "arm,gic";
68 reg = <0x38800000 0x10000>, /* GIC Dist */
69 <0x38880000 0xc0000>; /* GICR (RD_base + SGI_base) */
70 interrupt-controller;
71 #interrupt-cells = <4>;
76 compatible = "nxp,imx-gpio";
77 reg = <0x30200000 DT_SIZE_K(64)>;
78 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
80 interrupt-names = "irq_0", "irq_1";
81 interrupt-parent = <&gic>;
83 gpio-controller;
84 #gpio-cells = <2>;
90 compatible = "nxp,imx-gpio";
91 reg = <0x30210000 DT_SIZE_K(64)>;
94 interrupt-names = "irq_0", "irq_1";
95 interrupt-parent = <&gic>;
97 gpio-controller;
98 #gpio-cells = <2>;
104 compatible = "nxp,imx-gpio";
105 reg = <0x30220000 DT_SIZE_K(64)>;
108 interrupt-names = "irq_0", "irq_1";
109 interrupt-parent = <&gic>;
111 gpio-controller;
112 #gpio-cells = <2>;
118 compatible = "nxp,imx-gpio";
119 reg = <0x30230000 DT_SIZE_K(64)>;
122 interrupt-names = "irq_0", "irq_1";
123 interrupt-parent = <&gic>;
125 gpio-controller;
126 #gpio-cells = <2>;
132 compatible = "nxp,imx-gpio";
133 reg = <0x30240000 DT_SIZE_K(64)>;
136 interrupt-names = "irq_0", "irq_1";
137 interrupt-parent = <&gic>;
139 gpio-controller;
140 #gpio-cells = <2>;
146 compatible = "nxp,imx-gpt";
147 reg = <0x302d0000 DT_SIZE_K(64)>;
148 interrupt-parent = <&gic>;
152 clocks = <&ccm IMX_CCM_GPT_IPG_CLK 0x6C 20>;
157 compatible = "nxp,imx-gpt";
158 reg = <0x302e0000 DT_SIZE_K(64)>;
159 interrupt-parent = <&gic>;
163 clocks = <&ccm IMX_CCM_GPT_IPG_CLK 0x68 24>;
168 compatible = "nxp,imx-iomuxc";
169 reg = <0x30330000 DT_SIZE_K(64)>;
173 compatible = "nxp,imx8mp-pinctrl";
178 compatible = "nxp,imx-ana";
179 reg = <0x30360000 DT_SIZE_K(64)>;
183 compatible = "nxp,imx-ccm";
184 reg = <0x30380000 DT_SIZE_K(64)>;
185 #clock-cells = <3>;
189 compatible = "nxp,imx-iuart";
190 reg = <0x30890000 DT_SIZE_K(64)>;
192 interrupt-names = "irq_0";
193 interrupt-parent = <&gic>;
194 clocks = <&ccm IMX_CCM_UART2_CLK 0x6c 24>;
201 compatible = "nxp,imx-iuart";
202 reg = <0x30a60000 DT_SIZE_K(64)>;
204 interrupt-names = "irq_0";
205 interrupt-parent = <&gic>;
206 clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>;
214 reg = <0x303d0000 DT_SIZE_K(64)>;
219 reg = <0x30be0000 DT_SIZE_K(64)>;
220 clocks = <&ccm IMX_CCM_ENET_CLK 0 0>;
225 compatible = "nxp,enet-mac";
227 interrupt-names = "COMMON";
228 interrupt-parent = <&gic>;
230 nxp,ptp-clock = <&enet_ptp_clock>;
234 compatible = "nxp,enet-mdio";
235 #address-cells = <1>;
236 #size-cells = <0>;
240 compatible = "nxp,enet-ptp-clock";
242 interrupt-parent = <&gic>;
243 clocks = <&ccm IMX_CCM_ENET_PLL 0 0>;