Lines Matching refs:U
19 clocks = <&rcc STM32_CLOCK(IOP, 4U)>;
29 clocks = <&rcc STM32_CLOCK(APB1, 22U)>;
41 clocks = <&rcc STM32_CLOCK(APB1, 30U)>;
52 clocks = <&rcc STM32_CLOCK(APB1, 14U)>;
60 clocks = <&rcc STM32_CLOCK(APB1, 1U)>;
61 resets = <&rctl STM32_RESET(APB1, 1U)>;
82 clocks = <&rcc STM32_CLOCK(APB1, 4U)>;
83 resets = <&rctl STM32_RESET(APB1, 4U)>;
98 clocks = <&rcc STM32_CLOCK(APB1, 5U)>;
99 resets = <&rctl STM32_RESET(APB1, 5U)>;
114 clocks = <&rcc STM32_CLOCK(APB2, 5U)>;
115 resets = <&rctl STM32_RESET(APB2, 5U)>;
136 clocks = <&rcc STM32_CLOCK(APB2, 14U)>;
137 resets = <&rctl STM32_RESET(APB2, 14U)>;
145 clocks = <&rcc STM32_CLOCK(APB1, 19U)>;
146 resets = <&rctl STM32_RESET(APB1, 19U)>;
154 clocks = <&rcc STM32_CLOCK(APB1, 20U)>;
155 resets = <&rctl STM32_RESET(APB1, 20U)>;