Lines Matching +full:stm32 +full:- +full:dma +full:- +full:v2
3 * Copyright (c) 2019-2024 STMicroelectronics
6 * Copyright (c) 2021 G-Technologies Sdn. Bhd.
8 * SPDX-License-Identifier: Apache-2.0
11 #include <arm/armv6-m.dtsi>
12 #include <zephyr/dt-bindings/clock/stm32g0_clock.h>
13 #include <zephyr/dt-bindings/gpio/gpio.h>
14 #include <zephyr/dt-bindings/i2c/i2c.h>
15 #include <zephyr/dt-bindings/pwm/pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/adc.h>
18 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
19 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
20 #include <zephyr/dt-bindings/reset/stm32g0_reset.h>
25 zephyr,flash-controller = &flash;
29 #address-cells = <1>;
30 #size-cells = <0>;
34 compatible = "arm,cortex-m0+";
36 cpu-power-states = <&stop0 &stop1>;
39 power-states {
41 compatible = "zephyr,power-state";
42 power-state-name = "suspend-to-idle";
43 substate-id = <1>;
44 min-residency-us = <20>;
47 compatible = "zephyr,power-state";
48 power-state-name = "suspend-to-idle";
49 substate-id = <2>;
50 min-residency-us = <100>;
56 compatible = "mmio-sram";
60 clk_hse: clk-hse {
61 #clock-cells = <0>;
62 compatible = "st,stm32-hse-clock";
66 clk_hsi: clk-hsi {
67 #clock-cells = <0>;
68 compatible = "st,stm32g0-hsi-clock";
69 hsi-div = <1>;
70 clock-frequency = <DT_FREQ_M(16)>;
74 clk_lse: clk-lse {
75 #clock-cells = <0>;
76 compatible = "st,stm32-lse-clock";
77 clock-frequency = <32768>;
78 driving-capability = <0>;
82 clk_lsi: clk-lsi {
83 #clock-cells = <0>;
84 compatible = "fixed-clock";
85 clock-frequency = <DT_FREQ_K(32)>;
90 #clock-cells = <0>;
91 compatible = "st,stm32g0-pll-clock";
97 flash: flash-controller@40022000 {
98 compatible = "st,stm32-flash-controller", "st,stm32g0-flash-controller";
103 #address-cells = <1>;
104 #size-cells = <1>;
107 compatible = "st,stm32-nv-flash", "soc-nv-flash";
109 write-block-size = <8>;
110 erase-block-size = <2048>;
112 max-erase-time = <40>;
117 compatible = "st,stm32f0-rcc";
118 #clock-cells = <2>;
121 rctl: reset-controller {
122 compatible = "st,stm32-rcc-rctl";
123 #reset-cells = <1>;
127 exti: interrupt-controller@40021800 {
128 compatible = "st,stm32g0-exti", "st,stm32-exti";
129 interrupt-controller;
130 #interrupt-cells = <1>;
131 #address-cells = <1>;
133 num-lines = <16>;
135 interrupt-names = "line0-1", "line2-3", "line4-15";
136 line-ranges = <0 2>, <2 2>, <4 12>;
139 pinctrl: pin-controller@50000000 {
140 compatible = "st,stm32-pinctrl";
141 #address-cells = <1>;
142 #size-cells = <1>;
146 compatible = "st,stm32-gpio";
147 gpio-controller;
148 #gpio-cells = <2>;
154 compatible = "st,stm32-gpio";
155 gpio-controller;
156 #gpio-cells = <2>;
162 compatible = "st,stm32-gpio";
163 gpio-controller;
164 #gpio-cells = <2>;
170 compatible = "st,stm32-gpio";
171 gpio-controller;
172 #gpio-cells = <2>;
178 compatible = "st,stm32-gpio";
179 gpio-controller;
180 #gpio-cells = <2>;
187 compatible = "st,stm32-rtc";
192 alarms-count = <2>;
193 alrm-exti-line = <19>;
203 compatible = "st,stm32-bbram";
204 st,backup-regs = <5>;
210 compatible = "st,stm32-watchdog";
216 compatible = "st,stm32-window-watchdog";
224 compatible = "st,stm32-usart", "st,stm32-uart";
233 compatible = "st,stm32-usart", "st,stm32-uart";
242 compatible = "st,stm32-lptim";
244 #address-cells = <1>;
245 #size-cells = <0>;
248 interrupt-names = "wakeup";
253 compatible = "st,stm32-timers";
258 interrupt-names = "brk_up_trg_com", "cc";
263 compatible = "st,stm32-pwm";
265 #pwm-cells = <3>;
269 compatible = "st,stm32-counter";
275 compatible = "st,stm32-timers";
280 interrupt-names = "global";
285 compatible = "st,stm32-pwm";
287 #pwm-cells = <3>;
291 compatible = "st,stm32-counter";
297 compatible = "st,stm32-timers";
302 interrupt-names = "global";
307 compatible = "st,stm32-pwm";
309 #pwm-cells = <3>;
313 compatible = "st,stm32-counter";
319 compatible = "st,stm32-timers";
324 interrupt-names = "global";
329 compatible = "st,stm32-pwm";
331 #pwm-cells = <3>;
335 compatible = "st,stm32-counter";
341 compatible = "st,stm32-timers";
346 interrupt-names = "global";
351 compatible = "st,stm32-pwm";
353 #pwm-cells = <3>;
357 compatible = "st,stm32-counter";
363 compatible = "st,stm32-i2c-v2";
364 clock-frequency = <I2C_BITRATE_STANDARD>;
365 #address-cells = <1>;
366 #size-cells = <0>;
370 interrupt-names = "combined";
375 compatible = "st,stm32-i2c-v2";
376 clock-frequency = <I2C_BITRATE_STANDARD>;
377 #address-cells = <1>;
378 #size-cells = <0>;
382 interrupt-names = "combined";
387 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
388 #address-cells = <1>;
389 #size-cells = <0>;
397 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
398 #address-cells = <1>;
399 #size-cells = <0>;
407 compatible = "st,stm32-adc";
412 #io-channel-cells = <1>;
423 sampling-times = <3 5 8 13 20 40 80 161>;
424 num-sampling-time-common-channels = <2>;
425 st,adc-sequencer = "NOT_FULLY_CONFIGURABLE";
426 st,adc-oversampler = "OVERSAMPLER_MINIMAL";
429 dma1: dma@40020000 {
430 compatible = "st,stm32-dma-v2";
431 #dma-cells = <3>;
435 dma-requests = <5>;
436 dma-offset = <0>;
442 compatible = "st,stm32-dmamux";
443 #dma-cells = <3>;
446 dma-channels = <5>;
447 dma-generators = <4>;
448 dma-requests= <49>;
454 compatible = "st,stm32-temp-cal";
455 ts-cal1-addr = <0x1FFF75A8>;
456 ts-cal2-addr = <0x1FFF75CA>;
457 ts-cal1-temp = <30>;
458 ts-cal2-temp = <130>;
459 ts-cal-vrefanalog = <3000>;
460 io-channels = <&adc1 12>;
465 compatible = "st,stm32-vref";
466 vrefint-cal-addr = <0x1FFF75AA>;
467 vrefint-cal-mv = <3000>;
468 io-channels = <&adc1 13>;
473 compatible = "st,stm32-vbat";
475 io-channels = <&adc1 14>;
480 compatible = "st,stm32-smbus";
481 #address-cells = <1>;
482 #size-cells = <0>;
488 compatible = "st,stm32-smbus";
489 #address-cells = <1>;
490 #size-cells = <0>;
497 arm,num-irq-priority-bits = <2>;