Lines Matching +full:master +full:- +full:can +full:- +full:reg
5 * SPDX-License-Identifier: Apache-2.0
16 compatible = "st,stm32f405", "st,stm32f4", "simple-bus";
18 pinctrl: pin-controller@40020000 {
19 reg = <0x40020000 0x2400>;
22 compatible = "st,stm32-gpio";
23 gpio-controller;
24 #gpio-cells = <2>;
25 reg = <0x40021400 0x400>;
30 compatible = "st,stm32-gpio";
31 gpio-controller;
32 #gpio-cells = <2>;
33 reg = <0x40021800 0x400>;
38 compatible = "st,stm32-gpio";
39 gpio-controller;
40 #gpio-cells = <2>;
41 reg = <0x40022000 0x400>;
47 compatible = "st,stm32-usart", "st,stm32-uart";
48 reg = <0x40004800 0x400>;
56 compatible ="st,stm32-uart";
57 reg = <0x40004c00 0x400>;
65 compatible = "st,stm32-uart";
66 reg = <0x40005000 0x400>;
74 compatible = "st,stm32-timers";
75 reg = <0x40001000 0x400>;
79 interrupt-names = "global";
84 compatible = "st,stm32-counter";
90 compatible = "st,stm32-timers";
91 reg = <0x40001400 0x400>;
95 interrupt-names = "global";
100 compatible = "st,stm32-counter";
106 compatible = "st,stm32-timers";
107 reg = <0x40010400 0x400>;
111 interrupt-names = "brk", "up", "trgcom", "cc";
116 compatible = "st,stm32-pwm";
118 #pwm-cells = <3>;
122 compatible = "st,stm32-qdec";
124 st,input-filter-level = <NO_FILTER>;
129 compatible = "st,stm32-timers";
130 reg = <0x40001800 0x400>;
134 interrupt-names = "global";
139 compatible = "st,stm32-pwm";
141 #pwm-cells = <3>;
145 compatible = "st,stm32-counter";
151 compatible = "st,stm32-timers";
152 reg = <0x40001c00 0x400>;
156 interrupt-names = "global";
161 compatible = "st,stm32-pwm";
163 #pwm-cells = <3>;
167 compatible = "st,stm32-counter";
173 compatible = "st,stm32-timers";
174 reg = <0x40002000 0x400>;
178 interrupt-names = "global";
183 compatible = "st,stm32-pwm";
185 #pwm-cells = <3>;
189 compatible = "st,stm32-counter";
195 compatible = "st,stm32-otghs";
196 reg = <0x40040000 0x40000>;
198 interrupt-names = "otghs", "ep1_out", "ep1_in";
199 num-bidir-endpoints = <6>;
200 ram-size = <4096>;
201 maximum-speed = "full-speed";
208 can1: can@40006400 {
209 compatible = "st,stm32-bxcan";
210 reg = <0x40006400 0x400>;
212 interrupt-names = "TX", "RX0", "RX1", "SCE";
217 can2: can@40006800 {
218 compatible = "st,stm32-bxcan";
219 reg = <0x40006800 0x400>;
221 interrupt-names = "TX", "RX0", "RX1", "SCE";
222 /* also enabling clock for can1 (master instance) */
224 master-can-reg = <0x40006400>;
229 compatible = "st,stm32-rng";
230 reg = <0x50060800 0x400>;
237 compatible = "zephyr,memory-region", "st,stm32-backup-sram";
238 reg = <0x40024000 DT_SIZE_K(4)>;
240 zephyr,memory-region = "BACKUP_SRAM";
245 compatible = "st,stm32-adc";
246 reg = <0x40012100 0x050>;
250 #io-channel-cells = <1>;
255 sampling-times = <3 15 28 56 84 112 144 480>;
256 st,adc-clock-source = "SYNC";
257 st,adc-sequencer = "FULLY_CONFIGURABLE";
258 st,adc-oversampler = "OVERSAMPLER_NONE";
262 compatible = "st,stm32-adc";
263 reg = <0x40012200 0x050>;
267 #io-channel-cells = <1>;
272 sampling-times = <3 15 28 56 84 112 144 480>;
273 st,adc-clock-source = "SYNC";
274 st,adc-sequencer = "FULLY_CONFIGURABLE";
275 st,adc-oversampler = "OVERSAMPLER_NONE";
279 compatible = "st,stm32-dac";
280 reg = <0x40007400 0x400>;
283 #io-channel-cells = <1>;
288 compatible = "usb-nop-xceiv";
289 #phy-cells = <0>;