Lines Matching +full:stm32 +full:- +full:rcc
4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/adc/stm32f1_adc.h>
12 compatible = "st,stm32f373", "st,stm32f3", "simple-bus";
14 rcc: rcc@40021000 { label
17 * prescaler in the RCC register
19 compatible = "st,stm32f1-rcc";
22 pinctrl: pin-controller@48000000 {
24 compatible = "st,stm32-gpio";
25 gpio-controller;
26 #gpio-cells = <2>;
28 clocks = <&rcc STM32_CLOCK(AHB1, 21U)>;
33 compatible = "st,stm32-i2c-v2";
34 clock-frequency = <I2C_BITRATE_STANDARD>;
35 #address-cells = <1>;
36 #size-cells = <0>;
38 clocks = <&rcc STM32_CLOCK(APB1, 22U)>,
42 <&rcc STM32_SRC_SYSCLK I2C2_SEL(1)>;
44 interrupt-names = "event", "error";
49 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
50 #address-cells = <1>;
51 #size-cells = <0>;
53 clocks = <&rcc STM32_CLOCK(APB1, 14U)>;
59 compatible = "st,stm32-spi-fifo", "st,stm32-spi";
60 #address-cells = <1>;
61 #size-cells = <0>;
63 clocks = <&rcc STM32_CLOCK(APB1, 15U)>;
69 compatible = "st,stm32-timers";
71 clocks = <&rcc STM32_CLOCK(APB1, 2U)>;
74 interrupt-names = "global";
79 compatible = "st,stm32-pwm";
81 #pwm-cells = <3>;
86 compatible = "st,stm32-timers";
88 clocks = <&rcc STM32_CLOCK(APB1, 3U)>;
91 interrupt-names = "global";
96 compatible = "st,stm32-pwm";
98 #pwm-cells = <3>;
103 compatible = "st,stm32-timers";
105 clocks = <&rcc STM32_CLOCK(APB1, 6U)>;
108 interrupt-names = "global";
113 compatible = "st,stm32-pwm";
115 #pwm-cells = <3>;
120 compatible = "st,stm32-timers";
122 clocks = <&rcc STM32_CLOCK(APB1, 7U)>;
125 interrupt-names = "global";
130 compatible = "st,stm32-pwm";
132 #pwm-cells = <3>;
137 compatible = "st,stm32-timers";
139 clocks = <&rcc STM32_CLOCK(APB1, 8U)>;
142 interrupt-names = "global";
147 compatible = "st,stm32-pwm";
149 #pwm-cells = <3>;
154 compatible = "st,stm32-timers";
156 clocks = <&rcc STM32_CLOCK(APB1, 9U)>;
159 interrupt-names = "global";
164 compatible = "st,stm32-pwm";
166 #pwm-cells = <3>;
171 compatible = "st,stm32-timers";
173 clocks = <&rcc STM32_CLOCK(APB2, 19U)>;
176 interrupt-names = "global";
181 compatible = "st,stm32-pwm";
183 #pwm-cells = <3>;
188 compatible = "st,stm32f1-adc", "st,stm32-adc";
190 clocks = <&rcc STM32_CLOCK(APB2, 9U)>;
193 #io-channel-cells = <1>;
195 sampling-times = <2 8 14 29 42 56 72 240>;
196 st,adc-sequencer = "FULLY_CONFIGURABLE";
197 st,adc-oversampler = "OVERSAMPLER_NONE";
202 compatible = "st,stm32-bbram";
203 st,backup-regs = <32>;
210 io-channels = <&adc1 17>;
214 io-channels = <&adc1 18>;
218 compatible = "st,stm32-smbus";
219 #address-cells = <1>;
220 #size-cells = <0>;