Lines Matching +full:apb1 +full:- +full:prescaler
2 * Copyright (c) 2017 I-SENSE group of ICCS
7 * SPDX-License-Identifier: Apache-2.0
19 flash-controller@40022000 {
22 erase-block-size = <DT_SIZE_K(2)>;
27 compatible = "st,stm32-uart";
29 clocks = <&rcc STM32_CLOCK(APB1, 19U)>;
30 resets = <&rctl STM32_RESET(APB1, 19U)>;
36 compatible = "st,stm32-uart";
38 clocks = <&rcc STM32_CLOCK(APB1, 20U)>;
39 resets = <&rctl STM32_RESET(APB1, 20U)>;
45 compatible = "st,stm32-timers";
47 clocks = <&rcc STM32_CLOCK(APB1, 3U)>;
48 resets = <&rctl STM32_RESET(APB1, 3U)>;
50 interrupt-names = "global";
51 st,prescaler = <0>;
55 compatible = "st,stm32-pwm";
57 #pwm-cells = <3>;
62 compatible = "st,stm32-timers";
64 clocks = <&rcc STM32_CLOCK(APB1, 4U)>;
65 resets = <&rctl STM32_RESET(APB1, 4U)>;
67 interrupt-names = "global";
68 st,prescaler = <0>;
73 compatible = "st,stm32-timers";
75 clocks = <&rcc STM32_CLOCK(APB1, 5U)>;
76 resets = <&rctl STM32_RESET(APB1, 5U)>;
78 interrupt-names = "global";
79 st,prescaler = <0>;
84 compatible = "st,stm32-spi";
85 #address-cells = <1>;
86 #size-cells = <0>;
88 clocks = <&rcc STM32_CLOCK(APB1, 15U)>;
94 compatible = "st,stm32-dac";
96 clocks = <&rcc STM32_CLOCK(APB1, 29U)>;
98 #io-channel-cells = <1>;
101 pinctrl: pin-controller@40010800 {
105 compatible = "st,stm32-gpio";
106 gpio-controller;
107 #gpio-cells = <2>;
113 compatible = "st,stm32-gpio";
114 gpio-controller;
115 #gpio-cells = <2>;
122 compatible = "st,stm32-adc";
128 #io-channel-cells = <1>;
132 compatible = "st,stm32-adc";
137 #io-channel-cells = <1>;
141 compatible = "st,stm32-timers";
146 interrupt-names = "brk", "up", "trgcom", "cc";
147 st,prescaler = <0>;
151 compatible = "st,stm32-pwm";
153 #pwm-cells = <3>;
158 compatible = "st,stm32-dma-v2bis";
159 #dma-cells = <2>;