Lines Matching +full:0 +full:x100
15 reg = <0x20000000 DT_SIZE_K(256)>;
22 reg = <0x40118100 0x100>;
36 reg = <0x40118200 0x100>;
50 reg = <0x40118300 0x100>;
64 reg = <0x40118400 0x100>;
78 reg = <0x40118500 0x100>;
92 reg = <0x40118600 0x100>;
106 reg = <0x40118700 0x100>;
120 reg = <0x40118800 0x100>;
132 channel-available-mask = <0x33ff>;
137 channel-available-mask = <0x7f0007>;
142 reg = <0x400800c0 0x20>;
152 reg = <0x400800e0 0x20>;
162 reg = <0x40080100 0x20>;
175 reg = <0x40169000 0x100>;
185 reg = <0x40169300 0x100>;
195 reg = <0x40169600 0x100>;
205 reg = <0x40169700 0x100>;
215 reg = <0x40169800 0x100>;
225 reg = <0x40169900 0x100>;
238 #clock-cells = <0>;
245 #clock-cells = <0>;
251 #clock-cells = <0>;
257 #clock-cells = <0>;
263 #clock-cells = <0>;
269 #clock-cells = <0>;
274 mul = <25 0>;
280 #clock-cells = <0>;
284 mul = <20 0>;
290 reg = <0x40084000 4>, <0x40084004 4>, <0x40084008 4>,
291 <0x4008400c 4>, <0x40084010 4>;
294 #clock-cells = <0>;
339 sdclk = <0>;
340 #clock-cells = <0>;
386 port-irq6-pins = <0>;
406 port-irq2-pins = <0>;
450 port-irq0-pins = <0>;