Lines Matching +full:pll +full:- +full:clock +full:- +full:names
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/renesas/ra/ra4/ra4-cm33-common.dtsi>
8 #include <zephyr/dt-bindings/clock/ra_clock.h>
9 #include <zephyr/dt-bindings/pwm/ra_pwm.h>
11 /delete-node/ &spi1;
13 /delete-node/ &adc1;
18 compatible = "mmio-sram";
23 compatible = "renesas,ra-gpio-ioport";
26 gpio-controller;
27 #gpio-cells = <2>;
33 compatible = "renesas,ra-gpio-ioport";
36 gpio-controller;
37 #gpio-cells = <2>;
43 compatible = "renesas,ra-sci";
45 interrupt-names = "rxi", "txi", "tei", "eri";
50 compatible = "renesas,ra-sci-uart";
57 compatible = "renesas,ra-sci";
59 interrupt-names = "rxi", "txi", "tei", "eri";
64 compatible = "renesas,ra-sci-uart";
71 compatible = "renesas,ra-sci";
73 interrupt-names = "rxi", "txi", "tei", "eri";
78 compatible = "renesas,ra-sci-uart";
85 compatible = "renesas,ra-sci";
87 interrupt-names = "rxi", "txi", "tei", "eri";
92 compatible = "renesas,ra-sci-uart";
99 channel-count = <13>;
100 channel-available-mask = <0x139ff>;
104 compatible = "renesas,ra-pwm";
109 #pwm-cells = <3>;
114 compatible = "renesas,ra-pwm";
119 #pwm-cells = <3>;
124 compatible = "renesas,ra-pwm";
129 #pwm-cells = <3>;
134 compatible = "renesas,ra-pwm";
139 #pwm-cells = <3>;
145 #address-cells = <1>;
146 #size-cells = <1>;
148 xtal: clock-main-osc {
149 compatible = "renesas,ra-cgc-external-clock";
150 clock-frequency = <DT_FREQ_M(24)>;
151 #clock-cells = <0>;
155 hoco: clock-hoco {
156 compatible = "fixed-clock";
157 clock-frequency = <DT_FREQ_M(20)>;
158 #clock-cells = <0>;
161 moco: clock-moco {
162 compatible = "fixed-clock";
163 clock-frequency = <DT_FREQ_M(8)>;
164 #clock-cells = <0>;
167 loco: clock-loco {
168 compatible = "fixed-clock";
169 clock-frequency = <32768>;
170 #clock-cells = <0>;
173 subclk: clock-subclk {
174 compatible = "renesas,ra-cgc-subclk";
175 clock-frequency = <32768>;
176 #clock-cells = <0>;
180 pll: pll { label
181 compatible = "renesas,ra-cgc-pll";
182 #clock-cells = <0>;
184 /* PLL */
192 compatible = "renesas,ra-cgc-pll";
193 #clock-cells = <0>;
195 /* PLL */
202 compatible = "renesas,ra-cgc-pclk-block";
205 reg-names = "MSTPA", "MSTPB","MSTPC",
207 #clock-cells = <0>;
208 clocks = <&pll>;
212 compatible = "renesas,ra-cgc-pclk";
214 #clock-cells = <2>;
219 compatible = "renesas,ra-cgc-pclk";
221 #clock-cells = <2>;
226 compatible = "renesas,ra-cgc-pclk";
228 #clock-cells = <2>;
233 compatible = "renesas,ra-cgc-pclk";
235 #clock-cells = <2>;
240 compatible = "renesas,ra-cgc-pclk";
242 #clock-cells = <2>;
247 compatible = "renesas,ra-cgc-pclk";
249 #clock-cells = <2>;
254 compatible = "renesas,ra-cgc-pclk";
255 #clock-cells = <2>;
260 compatible = "renesas,ra-cgc-pclk";
261 #clock-cells = <2>;
269 port-irqs = <&port_irq6 &port_irq7 &port_irq8
272 port-irq-names = "port-irq6",
273 "port-irq7",
274 "port-irq8",
275 "port-irq9",
276 "port-irq10",
277 "port-irq11",
278 "port-irq12",
279 "port-irq13";
280 port-irq6-pins = <0>;
281 port-irq7-pins = <1>;
282 port-irq8-pins = <2>;
283 port-irq9-pins = <4>;
284 port-irq10-pins = <5>;
285 port-irq11-pins = <6>;
286 port-irq12-pins = <8>;
287 port-irq13-pins = <15>;
291 port-irqs = <&port_irq0 &port_irq1 &port_irq2
293 port-irq-names = "port-irq0",
294 "port-irq1",
295 "port-irq2",
296 "port-irq3",
297 "port-irq4";
298 port-irq0-pins = <5>;
299 port-irq1-pins = <1 4>;
300 port-irq2-pins = <0>;
301 port-irq3-pins = <10>;
302 port-irq4-pins = <11>;
306 port-irqs = <&port_irq0 &port_irq1 &port_irq2
308 port-irq-names = "port-irq0",
309 "port-irq1",
310 "port-irq2",
311 "port-irq3";
312 port-irq0-pins = <6>;
313 port-irq1-pins = <5>;
314 port-irq2-pins = <13>;
315 port-irq3-pins = <12>;
319 port-irqs = <&port_irq5 &port_irq6
321 port-irq-names = "port-irq5",
322 "port-irq6",
323 "port-irq8",
324 "port-irq9";
325 port-irq5-pins = <2>;
326 port-irq6-pins = <1>;
327 port-irq8-pins = <5>;
328 port-irq9-pins = <4>;
332 port-irqs = <&port_irq0 &port_irq4 &port_irq5
335 port-irq-names = "port-irq0",
336 "port-irq4",
337 "port-irq5",
338 "port-irq6",
339 "port-irq7",
340 "port-irq8",
341 "port-irq9",
342 "port-irq14",
343 "port-irq15";
344 port-irq0-pins = <0>;
345 port-irq4-pins = <2 11>;
346 port-irq5-pins = <1 10>;
347 port-irq6-pins = <9>;
348 port-irq7-pins = <8>;
349 port-irq8-pins = <15>;
350 port-irq9-pins = <14>;
351 port-irq14-pins = <3>;
352 port-irq15-pins = <4>;
356 port-irqs = <&port_irq11 &port_irq12 &port_irq14>;
357 port-irq-names = "port-irq11",
358 "port-irq12",
359 "port-irq14";
360 port-irq11-pins = <1>;
361 port-irq12-pins = <2>;
362 port-irq14-pins = <5>;
366 port-irqs = <&port_irq11>;
367 port-irq-names = "port-irq11";
368 port-irq11-pins = <8>;