Lines Matching +full:gpio +full:- +full:names
2 * Copyright 2022-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv8-r.dtsi>
9 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
10 #include <zephyr/dt-bindings/clock/nxp_s32z2_clock.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-r52";
26 compatible = "arm,cortex-r52";
32 compatible = "arm,cortex-r52";
38 compatible = "arm,cortex-r52";
44 compatible = "arm,cortex-r52";
50 compatible = "arm,cortex-r52";
56 compatible = "arm,cortex-r52";
62 compatible = "arm,cortex-r52";
73 interrupt-parent = <&gic>;
78 compatible = "nxp,s32ze-pinctrl";
83 interrupt-parent = <&gic>;
85 clock: clock-controller@40030000 {
86 compatible = "nxp,s32-clock";
100 #clock-cells = <1>;
104 gic: interrupt-controller@47800000 {
105 compatible = "arm,gic-v3", "arm,gic";
108 interrupt-controller;
109 #interrupt-cells = <4>;
114 compatible = "mmio-sram";
119 compatible = "mmio-sram";
124 compatible = "nxp,s32-linflexd";
131 compatible = "nxp,s32-linflexd";
138 compatible = "nxp,s32-linflexd";
145 compatible = "nxp,s32-linflexd";
152 compatible = "nxp,s32-linflexd";
159 compatible = "nxp,s32-linflexd";
166 compatible = "nxp,s32-linflexd";
173 compatible = "nxp,s32-linflexd";
180 compatible = "nxp,s32-linflexd";
187 compatible = "nxp,s32-linflexd";
194 compatible = "nxp,s32-linflexd";
201 compatible = "nxp,s32-linflexd";
208 compatible = "nxp,s32-linflexd";
216 #address-cells = <1>;
217 #size-cells = <1>;
220 compatible = "nxp,s32-siul2-eirq";
223 interrupt-controller;
224 #interrupt-cells = <2>;
228 gpioa: gpio@40521702 {
229 compatible = "nxp,s32-gpio";
231 reg-names = "pgpdo", "mscr";
232 interrupt-parent = <&eirq0>;
235 gpio-controller;
236 #gpio-cells = <2>;
241 gpiob: gpio@40521700 {
242 compatible = "nxp,s32-gpio";
244 reg-names = "pgpdo", "mscr";
245 interrupt-parent = <&eirq0>;
247 gpio-controller;
248 #gpio-cells = <2>;
253 gpioo: gpio@40521716 {
254 compatible = "nxp,s32-gpio";
256 reg-names = "pgpdo", "mscr";
257 gpio-controller;
258 #gpio-cells = <2>;
260 gpio-reserved-ranges = <0 10>;
267 #address-cells = <1>;
268 #size-cells = <1>;
271 compatible = "nxp,s32-siul2-eirq";
274 interrupt-controller;
275 #interrupt-cells = <2>;
279 gpioc: gpio@40d21700 {
280 compatible = "nxp,s32-gpio";
282 reg-names = "pgpdo", "mscr";
283 interrupt-parent = <&eirq1>;
285 gpio-controller;
286 #gpio-cells = <2>;
288 gpio-reserved-ranges = <0 15>;
292 gpiod: gpio@40d21706 {
293 compatible = "nxp,s32-gpio";
295 reg-names = "pgpdo", "mscr";
296 gpio-controller;
297 #gpio-cells = <2>;
302 gpioe: gpio@40d21704 {
303 compatible = "nxp,s32-gpio";
305 reg-names = "pgpdo", "mscr";
306 gpio-controller;
307 #gpio-cells = <2>;
312 gpiof: gpio@40d2170a {
313 compatible = "nxp,s32-gpio";
315 reg-names = "pgpdo", "mscr";
316 gpio-controller;
317 #gpio-cells = <2>;
322 gpiog: gpio@40d21708 {
323 compatible = "nxp,s32-gpio";
325 reg-names = "pgpdo", "mscr";
326 interrupt-parent = <&eirq1>;
329 gpio-controller;
330 #gpio-cells = <2>;
342 #address-cells = <1>;
343 #size-cells = <1>;
346 compatible = "nxp,s32-siul2-eirq";
349 interrupt-controller;
350 #interrupt-cells = <2>;
354 gpioh: gpio@42521708 {
355 compatible = "nxp,s32-gpio";
357 reg-names = "pgpdo", "mscr";
358 gpio-controller;
359 #gpio-cells = <2>;
361 gpio-reserved-ranges = <0 12>;
365 gpioi: gpio@4252170e {
366 compatible = "nxp,s32-gpio";
368 reg-names = "pgpdo", "mscr";
369 interrupt-parent = <&eirq4>;
371 gpio-controller;
372 #gpio-cells = <2>;
377 gpioj: gpio@4252170c {
378 compatible = "nxp,s32-gpio";
380 reg-names = "pgpdo", "mscr";
381 interrupt-parent = <&eirq4>;
383 gpio-controller;
384 #gpio-cells = <2>;
389 gpiok: gpio@42521712 {
390 compatible = "nxp,s32-gpio";
392 reg-names = "pgpdo", "mscr";
393 interrupt-parent = <&eirq4>;
396 gpio-controller;
397 #gpio-cells = <2>;
402 gpiol: gpio@42521710 {
403 compatible = "nxp,s32-gpio";
405 reg-names = "pgpdo", "mscr";
406 gpio-controller;
407 #gpio-cells = <2>;
415 #address-cells = <1>;
416 #size-cells = <1>;
419 compatible = "nxp,s32-siul2-eirq";
422 interrupt-controller;
423 #interrupt-cells = <2>;
427 gpiom: gpio@42d21710 {
428 compatible = "nxp,s32-gpio";
430 reg-names = "pgpdo", "mscr";
431 interrupt-parent = <&eirq5>;
433 gpio-controller;
434 #gpio-cells = <2>;
436 gpio-reserved-ranges = <0 2>;
440 gpion: gpio@42d21716 {
441 compatible = "nxp,s32-gpio";
443 reg-names = "pgpdo", "mscr";
444 interrupt-parent = <&eirq5>;
446 gpio-controller;
447 #gpio-cells = <2>;
454 compatible = "nxp,s32-spi";
458 num-cs = <5>;
459 #address-cells = <1>;
460 #size-cells = <0>;
465 compatible = "nxp,s32-spi";
469 num-cs = <5>;
470 #address-cells = <1>;
471 #size-cells = <0>;
476 compatible = "nxp,s32-spi";
480 num-cs = <5>;
481 #address-cells = <1>;
482 #size-cells = <0>;
487 compatible = "nxp,s32-spi";
491 num-cs = <5>;
492 #address-cells = <1>;
493 #size-cells = <0>;
498 compatible = "nxp,s32-spi";
502 num-cs = <5>;
503 #address-cells = <1>;
504 #size-cells = <0>;
509 compatible = "nxp,s32-spi";
513 num-cs = <5>;
514 #address-cells = <1>;
515 #size-cells = <0>;
520 compatible = "nxp,s32-spi";
524 num-cs = <5>;
525 #address-cells = <1>;
526 #size-cells = <0>;
531 compatible = "nxp,s32-spi";
535 num-cs = <5>;
536 #address-cells = <1>;
537 #size-cells = <0>;
542 compatible = "nxp,s32-spi";
546 num-cs = <5>;
547 #address-cells = <1>;
548 #size-cells = <0>;
553 compatible = "nxp,s32-spi";
557 num-cs = <5>;
558 #address-cells = <1>;
559 #size-cells = <0>;
568 #address-cells = <1>;
569 #size-cells = <0>;
574 compatible = "nxp,s32-mru";
577 #mbox-cells = <1>;
582 compatible = "nxp,s32-mru";
585 #mbox-cells = <1>;
590 compatible = "nxp,s32-mru";
593 #mbox-cells = <1>;
598 compatible = "nxp,s32-mru";
601 #mbox-cells = <1>;
606 compatible = "nxp,s32-mru";
609 #mbox-cells = <1>;
614 compatible = "nxp,s32-mru";
617 #mbox-cells = <1>;
622 compatible = "nxp,s32-mru";
625 #mbox-cells = <1>;
630 compatible = "nxp,s32-mru";
633 #mbox-cells = <1>;
639 #address-cells = <1>;
640 #size-cells = <1>;
644 compatible = "nxp,s32-netc-emdio";
647 #address-cells = <1>;
648 #size-cells = <0>;
652 compatible = "nxp,s32-netc-psi";
658 compatible = "nxp,s32-netc-vsi";
664 compatible = "nxp,s32-netc-vsi";
670 compatible = "nxp,s32-netc-vsi";
676 compatible = "nxp,s32-netc-vsi";
682 compatible = "nxp,s32-netc-vsi";
688 compatible = "nxp,s32-netc-vsi";
694 compatible = "nxp,s32-netc-vsi";
701 compatible = "nxp,s32-canxl";
706 reg-names = "sic", "rx_fifo", "rx_fifo_ctrl", "mru";
710 interrupt-names = "rx_tx_mru", "error";
715 compatible = "nxp,s32-canxl";
720 reg-names = "sic", "rx_fifo", "rx_fifo_ctrl", "mru";
724 interrupt-names = "rx_tx_mru", "error";
729 compatible = "nxp,flexcan-fd", "nxp,flexcan";
731 clk-source = <0>;
737 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
744 compatible = "nxp,flexcan-fd", "nxp,flexcan";
746 clk-source = <0>;
752 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
759 compatible = "nxp,flexcan-fd", "nxp,flexcan";
760 clk-source = <0>;
767 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
774 compatible = "nxp,flexcan-fd", "nxp,flexcan";
775 clk-source = <0>;
782 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
789 compatible = "nxp,flexcan-fd", "nxp,flexcan";
790 clk-source = <0>;
797 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
804 compatible = "nxp,flexcan-fd", "nxp,flexcan";
805 clk-source = <0>;
812 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
819 compatible = "nxp,flexcan-fd", "nxp,flexcan";
820 clk-source = <0>;
827 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
834 compatible = "nxp,flexcan-fd", "nxp,flexcan";
835 clk-source = <0>;
842 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
849 compatible = "nxp,flexcan-fd", "nxp,flexcan";
850 clk-source = <0>;
857 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
864 compatible = "nxp,flexcan-fd", "nxp,flexcan";
865 clk-source = <0>;
872 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
879 compatible = "nxp,flexcan-fd", "nxp,flexcan";
880 clk-source = <0>;
887 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
894 compatible = "nxp,flexcan-fd", "nxp,flexcan";
895 clk-source = <0>;
902 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
909 compatible = "nxp,flexcan-fd", "nxp,flexcan";
910 clk-source = <0>;
917 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
924 compatible = "nxp,flexcan-fd", "nxp,flexcan";
925 clk-source = <0>;
932 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
939 compatible = "nxp,flexcan-fd", "nxp,flexcan";
940 clk-source = <0>;
947 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
954 compatible = "nxp,flexcan-fd", "nxp,flexcan";
955 clk-source = <0>;
962 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
969 compatible = "nxp,flexcan-fd", "nxp,flexcan";
970 clk-source = <0>;
977 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
984 compatible = "nxp,flexcan-fd", "nxp,flexcan";
985 clk-source = <0>;
992 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
999 compatible = "nxp,flexcan-fd", "nxp,flexcan";
1000 clk-source = <0>;
1007 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
1014 compatible = "nxp,flexcan-fd", "nxp,flexcan";
1015 clk-source = <0>;
1022 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
1029 compatible = "nxp,flexcan-fd", "nxp,flexcan";
1030 clk-source = <0>;
1037 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
1044 compatible = "nxp,flexcan-fd", "nxp,flexcan";
1045 clk-source = <0>;
1052 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
1059 compatible = "nxp,flexcan-fd", "nxp,flexcan";
1060 clk-source = <0>;
1067 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
1074 compatible = "nxp,flexcan-fd", "nxp,flexcan";
1075 clk-source = <0>;
1082 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb",
1089 compatible = "nxp,s32-adc-sar";
1094 #io-channel-cells = <1>;
1099 compatible = "nxp,s32-adc-sar";
1104 #io-channel-cells = <1>;
1111 #address-cells = <1>;
1112 #size-cells = <0>;
1115 clock-frequency = <I2C_BITRATE_STANDARD>;
1122 #address-cells = <1>;
1123 #size-cells = <0>;
1126 clock-frequency = <I2C_BITRATE_STANDARD>;
1130 edma0: dma-controller@405d0000 {
1131 compatible = "nxp,mcux-edma";
1134 dma-channels = <32>;
1135 dma-requests = <64>;
1136 dmamux-reg-offset = <3>;
1137 #dma-cells = <2>;
1175 edma1: dma-controller@40dd0000 {
1176 compatible = "nxp,mcux-edma";
1179 dma-channels = <16>;
1180 dma-requests = <64>;
1181 dmamux-reg-offset = <3>;
1182 #dma-cells = <2>;
1204 edma4: dma-controller@425d0000 {
1205 compatible = "nxp,mcux-edma";
1208 dma-channels = <32>;
1209 dma-requests = <64>;
1210 dmamux-reg-offset = <3>;
1211 #dma-cells = <2>;
1233 edma5: dma-controller@42dd0000 {
1234 compatible = "nxp,mcux-edma";
1237 dma-channels = <32>;
1238 dma-requests = <64>;
1239 dmamux-reg-offset = <3>;
1240 #dma-cells = <2>;