Lines Matching +full:s32 +full:- +full:emios
2 * Copyright 2023-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/clock/nxp_s32k344_clock.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-m7";
25 compatible = "arm,cortex-m7";
30 compatible = "arm,armv7m-mpu";
37 compatible = "nxp,s32k3-pinctrl";
42 interrupt-parent = <&nvic>;
45 compatible = "zephyr,memory-region", "arm,itcm";
47 zephyr,memory-region = "ITCM";
51 compatible = "zephyr,memory-region", "arm,dtcm";
53 zephyr,memory-region = "DTCM";
57 compatible = "mmio-sram";
65 * need to check if "soc-nv-flash" can be used or a new binding need to be
73 clock: clock-controller@402c8000 {
74 compatible = "nxp,s32-clock";
81 #clock-cells = <1>;
87 #address-cells = <1>;
88 #size-cells = <1>;
91 compatible = "nxp,s32-siul2-eirq";
94 interrupt-controller;
95 #interrupt-cells = <2>;
100 compatible = "nxp,s32-gpio";
102 reg-names = "pgpdo", "mscr";
103 interrupt-parent = <&eirq0>;
109 nxp,wkpu-interrupts = <1 9>, <2 4>, <6 19>,
111 gpio-controller;
112 #gpio-cells = <2>;
118 compatible = "nxp,s32-gpio";
120 reg-names = "pgpdo", "mscr";
121 interrupt-parent = <&eirq0>;
125 nxp,wkpu-interrupts = <0 35>, <4 63>, <9 38>,
127 gpio-controller;
128 #gpio-cells = <2>;
134 compatible = "nxp,s32-gpio";
136 reg-names = "pgpdo", "mscr";
137 interrupt-parent = <&eirq0>;
142 nxp,wkpu-interrupts = <0 11>, <2 12>, <8 29>,
144 gpio-controller;
145 #gpio-cells = <2>;
147 gpio-reserved-ranges = <6 2>;
152 compatible = "nxp,s32-gpio";
154 reg-names = "pgpdo", "mscr";
155 interrupt-parent = <&eirq0>;
159 nxp,wkpu-interrupts = <0 17>, <1 18>, <3 42>,
161 gpio-controller;
162 #gpio-cells = <2>;
168 compatible = "nxp,s32-gpio";
170 reg-names = "pgpdo", "mscr";
171 interrupt-parent = <&eirq0>;
177 nxp,wkpu-interrupts = <6 7>, <7 6>, <9 14>, <11 22>;
178 gpio-controller;
179 #gpio-cells = <2>;
185 compatible = "nxp,s32-gpio";
187 reg-names = "pgpdo", "mscr";
188 interrupt-parent = <&eirq0>;
192 nxp,wkpu-interrupts = <2 40>, <4 47>, <7 48>,
194 gpio-controller;
195 #gpio-cells = <2>;
201 compatible = "nxp,s32-gpio";
203 reg-names = "pgpdo", "mscr";
204 interrupt-parent = <&eirq0>;
210 nxp,wkpu-interrupts = <0 10>, <2 13>, <3 5>,
212 gpio-controller;
213 #gpio-cells = <2>;
219 compatible = "nxp,s32-gpio";
221 reg-names = "pgpdo", "mscr";
222 interrupt-parent = <&eirq0>;
226 nxp,wkpu-interrupts = <4 58>, <7 54>, <11 55>,
228 gpio-controller;
229 #gpio-cells = <2>;
235 compatible = "nxp,s32-gpio";
237 reg-names = "pgpdo", "mscr";
238 interrupt-parent = <&eirq0>;
244 nxp,wkpu-interrupts = <0 30>, <2 31>, <5 36>,
246 gpio-controller;
247 #gpio-cells = <2>;
253 compatible = "nxp,s32-gpio";
255 reg-names = "pgpdo", "mscr";
256 interrupt-parent = <&eirq0>;
259 nxp,wkpu-interrupts = <0 23>, <2 59>, <5 60>,
261 gpio-controller;
262 #gpio-cells = <2>;
268 compatible = "nxp,s32-gpio";
270 reg-names = "pgpdo", "mscr";
271 interrupt-parent = <&eirq0>;
276 gpio-controller;
277 #gpio-cells = <2>;
283 compatible = "nxp,s32-gpio";
285 reg-names = "pgpdo", "mscr";
286 gpio-controller;
287 #gpio-cells = <2>;
293 compatible = "nxp,s32-gpio";
295 reg-names = "pgpdo", "mscr";
296 interrupt-parent = <&eirq0>;
301 gpio-controller;
302 #gpio-cells = <2>;
308 compatible = "nxp,s32-gpio";
310 reg-names = "pgpdo", "mscr";
311 gpio-controller;
312 #gpio-cells = <2>;
319 compatible = "nxp,s32-wkpu";
454 compatible = "nxp,s32-qspi";
456 #address-cells = <1>;
457 #size-cells = <0>;
462 compatible = "nxp,flexcan-fd", "nxp,flexcan";
465 clk-source = <0>;
467 interrupt-names = "ored", "ored_0_31_mb",
473 compatible = "nxp,flexcan-fd", "nxp,flexcan";
476 clk-source = <0>;
478 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb";
483 compatible = "nxp,flexcan-fd", "nxp,flexcan";
486 clk-source = <0>;
488 interrupt-names = "ored", "ored_0_31_mb", "ored_32_63_mb";
493 compatible = "nxp,flexcan-fd", "nxp,flexcan";
496 clk-source = <0>;
498 interrupt-names = "ored", "ored_0_31_mb";
503 compatible = "nxp,flexcan-fd", "nxp,flexcan";
506 clk-source = <0>;
508 interrupt-names = "ored", "ored_0_31_mb";
513 compatible = "nxp,flexcan-fd", "nxp,flexcan";
516 clk-source = <0>;
518 interrupt-names = "ored", "ored_0_31_mb";
526 #address-cells = <1>;
527 #size-cells = <0>;
536 #address-cells = <1>;
537 #size-cells = <0>;
543 compatible = "nxp,s32-adc-sar";
546 #io-channel-cells = <1>;
551 compatible = "nxp,s32-adc-sar";
554 #io-channel-cells = <1>;
559 compatible = "nxp,s32-adc-sar";
562 #io-channel-cells = <1>;
571 #address-cells = <1>;
572 #size-cells = <0>;
581 #address-cells = <1>;
582 #size-cells = <0>;
591 #address-cells = <1>;
592 #size-cells = <0>;
601 #address-cells = <1>;
602 #size-cells = <0>;
611 #address-cells = <1>;
612 #size-cells = <0>;
621 #address-cells = <1>;
622 #size-cells = <0>;
628 compatible = "nxp,s32-gmac";
630 interrupt-names = "common", "tx", "rx", "safety";
636 compatible = "nxp,s32-gmac-mdio";
638 #address-cells = <1>;
639 #size-cells = <0>;
643 edma0: dma-controller@4020c000 {
644 compatible = "nxp,mcux-edma";
647 dma-channels = <32>;
648 dma-requests = <64>;
649 dmamux-reg-offset = <3>;
650 channel-gap = <12 127>;
651 #dma-cells = <2>;
661 no-error-irq;
665 emios0: emios@40088000 {
666 compatible = "nxp,s32-emios";
671 interrupt-names = "0_0", "0_1", "0_2",
673 internal-cnt = <0xC101FF>;
679 bus-type = "BUS_A";
680 channel-mask = <0x07FFFFF>;
686 bus-type = "BUS_B";
687 channel-mask = <0x00000FE>;
693 bus-type = "BUS_C";
694 channel-mask = <0x0000FE00>;
700 bus-type = "BUS_D";
701 channel-mask = <0x00FE0000>;
707 bus-type = "BUS_F";
708 channel-mask = <0x0BFFFFF>;
714 compatible = "nxp,s32-emios-pwm";
715 #pwm-cells = <3>;
720 emios1: emios@4008c000 {
721 compatible = "nxp,s32-emios";
726 interrupt-names = "1_0", "1_1", "1_2",
728 internal-cnt = <0xC10101>;
734 bus-type = "BUS_A";
735 channel-mask = <0x07FFFFF>;
741 bus-type = "BUS_B";
742 channel-mask = <0x00000FE>;
748 bus-type = "BUS_C";
749 channel-mask = <0x0000FE00>;
755 bus-type = "BUS_D";
756 channel-mask = <0x00FE0000>;
762 channel-mask = <0x0BFFFFF>;
763 bus-type = "BUS_F";
769 compatible = "nxp,s32-emios-pwm";
770 #pwm-cells = <3>;
775 emios2: emios@40090000 {
776 compatible = "nxp,s32-emios";
781 interrupt-names = "2_0", "2_1", "2_2",
783 internal-cnt = <0xC10101>;
789 bus-type = "BUS_A";
790 channel-mask = <0x07FFFFF>;
796 bus-type = "BUS_B";
797 channel-mask = <0x00000FE>;
803 bus-type = "BUS_C";
804 channel-mask = <0x0000FE00>;
810 bus-type = "BUS_D";
811 channel-mask = <0x00FE0000>;
817 bus-type = "BUS_F";
818 channel-mask = <0x0BFFFFF>;
824 compatible = "nxp,s32-emios-pwm";
825 #pwm-cells = <3>;
838 compatible = "nxp,flexio-pwm";
839 #pwm-cells = <3>;
845 compatible = "nxp,s32-lcu";
851 compatible = "nxp,s32-lcu";
857 compatible = "nxp,s32-trgmux";
863 compatible = "nxp,s32k3-pmc";
868 compatible = "nxp,s32-mc-me";
873 compatible = "nxp,s32-mc-rgm";
875 func-reset-threshold = <0>;
876 dest-reset-threshold = <0>;
880 compatible = "nxp,s32-swt";
884 service-mode = "fixed";
889 compatible = "nxp,s32-sys-timer";
897 compatible = "nxp,s32-sys-timer";
907 arm,num-irq-priority-bits = <4>;