Lines Matching refs:clkctl1
141 clkctl1: clkctl@21000 { label
239 clocks = <&clkctl1 MCUX_FLEXCOMM0_CLK>;
248 clocks = <&clkctl1 MCUX_FLEXCOMM1_CLK>;
257 clocks = <&clkctl1 MCUX_FLEXCOMM2_CLK>;
266 clocks = <&clkctl1 MCUX_FLEXCOMM3_CLK>;
275 clocks = <&clkctl1 MCUX_FLEXCOMM4_CLK>;
284 clocks = <&clkctl1 MCUX_FLEXCOMM5_CLK>;
293 clocks = <&clkctl1 MCUX_FLEXCOMM6_CLK>;
302 clocks = <&clkctl1 MCUX_FLEXCOMM7_CLK>;
311 clocks = <&clkctl1 MCUX_PMIC_I2C_CLK>;
320 clocks = <&clkctl1 MCUX_FLEXCOMM8_CLK>;
329 clocks = <&clkctl1 MCUX_FLEXCOMM9_CLK>;
338 clocks = <&clkctl1 MCUX_FLEXCOMM10_CLK>;
347 clocks = <&clkctl1 MCUX_FLEXCOMM11_CLK>;
356 clocks = <&clkctl1 MCUX_FLEXCOMM12_CLK>;
365 clocks = <&clkctl1 MCUX_FLEXCOMM13_CLK>;
389 clocks = <&clkctl1 MCUX_HS_SPI_CLK>;
400 clocks = <&clkctl1 MCUX_HS_SPI1_CLK>;
529 clocks = <&clkctl1 MCUX_SCTIMER_CLK>;
553 clocks = <&clkctl1 MCUX_USDHC1_CLK>;
565 clocks = <&clkctl1 MCUX_USDHC2_CLK>;
583 clocks = <&clkctl1 MCUX_LPADC1_CLK>;
601 clocks = <&clkctl1 MCUX_CTIMER0_CLK>;
613 clocks = <&clkctl1 MCUX_CTIMER1_CLK>;
625 clocks = <&clkctl1 MCUX_CTIMER2_CLK>;
637 clocks = <&clkctl1 MCUX_CTIMER3_CLK>;
649 clocks = <&clkctl1 MCUX_CTIMER4_CLK>;
661 clocks = <&clkctl1 MCUX_MIPI_DSI_DPHY_CLK>,
662 <&clkctl1 MCUX_MIPI_DSI_ESC_CLK>,
663 <&clkctl1 MCUX_LCDIF_PIXEL_CLK>;
672 clocks = <&clkctl1 MCUX_I3C_CLK>;
696 clocks = <&clkctl1 MCUX_MRT_CLK>;
730 clocks = <&clkctl1 MCUX_FLEXSPI_CLK>;
739 clocks = <&clkctl1 MCUX_FLEXSPI2_CLK>;