Lines Matching +full:num +full:- +full:ram +full:- +full:banks

2  * Copyright 2021-2023 NXP
4  * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/memory-controller/nxp,flexram.h>
12 		/delete-node/ cpu@1;
23 		/delete-node/ dma-controller@40c14000;
31 			#address-cells = <1>;
32 			#size-cells = <1>;
34 			flexram,bank-size = <32>;
35 			flexram,num-ram-banks = <16>;
36 			flexram,has-magic-addr;
38 			flexram,bank-spec = <FLEXRAM_DTCM>,
56 				compatible = "zephyr,memory-region", "nxp,imx-itcm";
58 				zephyr,memory-region = "ITCM";
62 				compatible = "zephyr,memory-region", "nxp,imx-dtcm";
64 				zephyr,memory-region = "DTCM";
67 			/* no ocram node for this bank-spec */
75 			compatible = "nxp,imx-gpio";
78 			gpio-controller;
79 			#gpio-cells = <2>;
83 			compatible = "nxp,imx-gpio";
86 			gpio-controller;
87 			#gpio-cells = <2>;
91 			compatible = "nxp,imx-gpio";
94 			gpio-controller;
95 			#gpio-cells = <2>;
99 			compatible = "nxp,imx-gpio";
101 			gpio-controller;
102 			#gpio-cells = <2>;
106 			compatible = "nxp,imx-mu";
117 	dma-names = "rx", "tx";
118 	nxp,tx-dma-channel = <0>;
119 	nxp,rx-dma-channel = <1>;
124 	dma-names = "rx", "tx";
125 	nxp,tx-dma-channel = <3>;
126 	nxp,rx-dma-channel = <4>;
131 	dma-names = "rx", "tx";
132 	nxp,tx-dma-channel = <5>;
133 	nxp,rx-dma-channel = <6>;
138 	dma-names = "rx", "tx";
139 	nxp,tx-dma-channel = <7>;
140 	nxp,rx-dma-channel = <8>;
145 	dma-names = "tx", "rx";
150 	dma-names = "tx", "rx";
155 	dma-names = "tx", "rx";
160 	dma-names = "tx", "rx";
165 	dma-names = "tx", "rx";
170 	dma-names = "tx", "rx";
175 	dma-names = "tx", "rx";
180 	dma-names = "tx", "rx";
185 	dma-names = "tx", "rx";
190 	dma-names = "tx", "rx";
195 	dma-names = "tx", "rx";
200 	dma-names = "tx", "rx";
226 	cpu-power-states = <&idle &suspend>;