Lines Matching +full:num +full:- +full:ss +full:- +full:bits
5 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h>
14 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
15 #include <arm/armv8-m.dtsi>
16 #include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h>
24 zephyr,flash-controller = &iap;
28 #address-cells = <1>;
29 #size-cells = <0>;
32 compatible = "arm,cortex-m33f";
34 #address-cells = <1>;
35 #size-cells = <1>;
36 cpu-power-states = <&sleep>;
39 compatible = "arm,armv8m-mpu";
44 compatible = "arm,cortex-m33";
48 power-states {
50 compatible = "zephyr,power-state";
51 power-state-name = "runtime-idle";
52 min-residency-us = <4>;
53 exit-latency-us = <4>;
60 #address-cells = <1>;
61 #size-cells = <1>;
64 compatible = "mmio-sram";
77 compatible = "mmio-sram";
82 compatible = "mmio-sram";
87 compatible = "mmio-sram";
92 compatible = "mmio-sram";
97 compatible = "mmio-sram";
103 #address-cells = <1>;
104 #size-cells = <1>;
107 compatible = "zephyr,memory-region", "mmio-sram";
109 zephyr,memory-region = "USB_SRAM";
110 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
114 compatible = "nxp,lpc-syscon";
116 #clock-cells = <1>;
118 compatible = "nxp,lpc-syscon-reset";
119 #reset-cells = <1>;
123 iap: flash-controller@34000 {
124 compatible = "nxp,iap-fmc55";
126 #address-cells = <1>;
127 #size-cells = <1>;
130 compatible = "soc-nv-flash";
132 erase-block-size = <512>;
133 write-block-size = <512>;
137 compatible = "soc-nv-flash";
143 compatible = "nxp,lpc-uid";
148 compatible = "soc-nv-flash";
154 compatible = "nxp,lpc-iocon";
156 #address-cells = <1>;
157 #size-cells = <1>;
160 compatible = "nxp,lpc-iocon-pinctrl";
165 compatible = "nxp,lpc-gpio";
167 #address-cells = <1>;
168 #size-cells = <0>;
171 compatible = "nxp,lpc-gpio-port";
173 int-source = "pint";
174 gpio-controller;
175 #gpio-cells = <2>;
179 compatible = "nxp,lpc-gpio-port";
181 int-source = "pint";
182 gpio-controller;
183 #gpio-cells = <2>;
190 interrupt-controller;
191 #interrupt-cells = <1>;
192 #address-cells = <0>;
195 num-lines = <8>;
196 num-inputs = <64>;
199 dma0: dma-controller@82000 {
200 compatible = "nxp,lpc-dma";
203 dma-channels = <23>;
204 nxp,dma-num-of-otrigs = <4>;
205 nxp,dma-otrig-base-address = <LPC55S69_DMA0_OTRIG_BASE>;
206 nxp,dma-itrig-base-address = <LPC55S69_DMA0_ITRIG_BASE>;
208 #dma-cells = <1>;
211 dma1: dma-controller@a7000 {
212 compatible = "nxp,lpc-dma";
215 dma-channels = <10>;
216 nxp,dma-num-of-otrigs = <4>;
217 nxp,dma-otrig-base-address = <LPC55S69_DMA1_OTRIG_BASE>;
218 nxp,dma-itrig-base-address = <LPC55S69_DMA1_ITRIG_BASE>;
220 #dma-cells = <1>;
224 compatible = "nxp,lpc-mailbox";
232 compatible = "nxp,lpc-flexcomm";
238 dma-names = "rx", "tx";
243 compatible = "nxp,lpc-flexcomm";
249 dma-names = "rx", "tx";
254 compatible = "nxp,lpc-flexcomm";
260 dma-names = "rx", "tx";
265 compatible = "nxp,lpc-flexcomm";
271 dma-names = "rx", "tx";
276 compatible = "nxp,lpc-flexcomm";
282 dma-names = "rx", "tx";
287 compatible = "nxp,lpc-flexcomm";
293 dma-names = "rx", "tx";
298 compatible = "nxp,lpc-flexcomm";
304 dma-names = "rx", "tx";
309 compatible = "nxp,lpc-flexcomm";
315 dma-names = "rx", "tx";
320 compatible = "nxp,lpc-sdif";
328 compatible = "nxp,lpc-spi";
329 /* Enabling cs-gpios below will allow using GPIO CS,
330 rather than Flexcomm SS */
331 /* cs-gpios = <&gpio0 20 GPIO_ACTIVE_LOW>,
340 dma-names = "rx", "tx";
342 #address-cells = <1>;
343 #size-cells = <0>;
347 compatible = "nxp,lpc-rng";
353 compatible = "nxp,lpc-wwdt";
357 clk-divider = <1>;
361 compatible = "nxp,lpc-lpadc";
365 clk-divider = <8>;
366 clk-source = <0>;
367 voltage-ref= <1>;
368 calibration-average = <128>;
369 power-level = <0>;
370 offset-value-a = <10>;
371 offset-value-b = <10>;
372 #io-channel-cells = <1>;
380 num-bidir-endpoints = <5>;
381 maximum-speed = "full-speed";
389 num-bidir-endpoints = <6>;
400 compatible = "nxp,lpc-ctimer";
404 clk-source = <3>;
412 compatible = "nxp,lpc-ctimer";
416 clk-source = <3>;
424 compatible = "nxp,lpc-ctimer";
428 clk-source = <3>;
436 compatible = "nxp,lpc-ctimer";
440 clk-source = <3>;
448 compatible = "nxp,lpc-ctimer";
452 clk-source = <3>;
460 compatible = "nxp,sctimer-pwm";
466 #pwm-cells = <3>;
473 num-channels = <4>;
474 num-bits = <24>;
477 #address-cells = <1>;
478 #size-cells = <0>;
481 compatible = "nxp,mrt-channel";
486 compatible = "nxp,mrt-channel";
491 compatible = "nxp,mrt-channel";
496 compatible = "nxp,mrt-channel";
504 arm,num-irq-priority-bits = <3>;