Lines Matching +full:0 +full:- +full:2
4 * SPDX-License-Identifier: Apache-2.0
6 #include <arm/armv6-m.dtsi>
7 #include <zephyr/dt-bindings/clock/lpc11u6x_clock.h>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <0>;
16 cpu0: cpu@0 {
17 compatible = "arm,cortex-m0+";
18 reg = <0>;
23 compatible = "mmio-sram";
27 compatible = "zephyr,memory-region", "mmio-sram";
28 reg = <0x20000000 0x800>;
29 zephyr,memory-region = "SRAM1";
33 compatible = "zephyr,memory-region", "mmio-sram";
34 reg = <0x20004000 0x800>;
35 zephyr,memory-region = "SRAM2";
39 flash0:flash@0 {
40 compatible = "soc-nv-flash";
43 /* On-chip EEPROM. */
45 compatible = "nxp,lpc11u6x-eeprom";
50 size = <(DT_SIZE_K(4) - 64)>;
55 compatible = "nxp,lpc-iocon";
56 reg = <0x40044000 0x150>;
57 #address-cells = <1>;
58 #size-cells = <1>;
59 ranges = <0x0 0x40044000 0x150>;
61 compatible = "nxp,lpc11u6x-pinctrl";
64 pio0: pio0@0 {
65 compatible = "nxp,lpc-iocon-pio";
66 reg = <0x0 0x60>;
70 compatible = "nxp,lpc-iocon-pio";
71 reg = <0x60 0x7C>;
75 compatible = "nxp,lpc-iocon-pio";
76 reg = <0xf0 0x60>;
81 gpio0: gpio@0 {
82 compatible = "nxp,lpc11u6x-gpio";
83 reg = <0xa0000000 0x8000>, <0x40048000 0x400>;
84 interrupts = <0 2>, <1 2>, <2 2>, <3 2>, \
85 <4 2>, <5 2>, <6 2>, <7 2>;
87 gpio-controller;
88 #gpio-cells = <2>;
99 compatible = "nxp,lpc11u6x-gpio";
100 reg = <0xa0000000 0x8000>, <0x40048000 0x400>;
101 interrupts = <0 2>, <1 2>, <2 2>, <3 2>, \
102 <4 2>, <5 2>, <6 2>, <7 2>;
104 gpio-controller;
105 #gpio-cells = <2>;
114 gpio2: gpio@2 {
115 compatible = "nxp,lpc11u6x-gpio";
116 reg = <0xa0000000 0x8000>, <0x40048000 0x400>;
117 interrupts = <0 2>, <1 2>, <2 2>, <3 2>, \
118 <4 2>, <5 2>, <6 2>, <7 2>;
120 gpio-controller;
121 #gpio-cells = <2>;
122 base = <2>;
131 syscon: clock-controller@40048000 {
132 compatible = "nxp,lpc11u6x-syscon";
133 #clock-cells = <1>;
134 reg = <0x40048000 0x400>;
138 compatible = "nxp,lpc11u6x-uart";
140 interrupts = <21 0>;
141 reg = <0x40008000 0x60>;
146 compatible = "nxp,lpc11u6x-uart";
148 interrupts = <11 0>;
149 reg = <0x4006C000 0x30>;
154 compatible = "nxp,lpc11u6x-uart";
156 interrupts = <12 0>;
157 reg = <0x40070000 0x30>;
162 compatible = "nxp,lpc11u6x-uart";
164 interrupts = <12 0>;
165 reg = <0x40074000 0x30>;
170 compatible = "nxp,lpc11u6x-uart";
172 interrupts = <11 0>;
173 reg = <0x4004C000 0x30>;
178 compatible = "nxp,lpc11u6x-i2c";
179 #address-cells = <1>;
180 #size-cells = <0>;
181 reg = <0x40000000 0x40>;
183 interrupts = <15 0>;
188 compatible = "nxp,lpc11u6x-i2c";
189 #address-cells = <1>;
190 #size-cells = <0>;
191 reg = <0x40020000 0x40>;
193 interrupts = <10 0>;
200 arm,num-irq-priority-bits = <2>;