Lines Matching +full:0 +full:x98

26 		#size-cells = <0>;
28 cpu0: cpu@0 {
31 reg = <0>;
57 reg = <0x20000000 DT_SIZE_K(32)>;
64 reg = <0x40064000 0xd>;
70 reg = <0x40065000 0x4>;
77 reg = <0x4003d000 0x808>;
83 reg = <0x40047000 0x1060>;
90 #clock-cells = <0>;
97 #clock-cells = <0>;
104 #clock-cells = <0>;
110 reg = <0x40020000 0x18>;
111 interrupts = <18 0>, <19 0>;
118 flash0: flash@0 {
120 reg = <0 DT_SIZE_K(512)>;
130 #size-cells = <0>;
131 reg = <0x40066000 0x1000>;
132 interrupts = <24 0>;
133 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 6>;
141 #size-cells = <0>;
142 reg = <0x40067000 0x1000>;
143 interrupts = <25 0>;
144 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 7>;
150 reg = <0x4006a000 0x1000>;
151 interrupts = <31 0>, <32 0>;
153 clocks = <&sim KINETIS_SIM_CORESYS_CLK 0x1034 10>;
160 reg = <0x4006b000 0x1000>;
161 interrupts = <33 0>, <34 0>;
163 clocks = <&sim KINETIS_SIM_CORESYS_CLK 0x1034 11>;
170 reg = <0x4006c000 0x1000>;
171 interrupts = <35 0>, <36 0>;
173 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 12>;
180 reg = <0x40049000 0xd0>;
181 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>;
186 reg = <0x4004a000 0xd0>;
187 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>;
192 reg = <0x4004b000 0xd0>;
193 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>;
198 reg = <0x4004c000 0xd0>;
199 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>;
204 reg = <0x4004d000 0xd0>;
205 clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>;
211 reg = <0x400ff000 0x40>;
221 reg = <0x400ff040 0x40>;
231 reg = <0x400ff080 0x40>;
241 reg = <0x400ff0c0 0x40>;
251 reg = <0x400ff100 0x40>;
260 reg = <0x4002c000 0x88>;
262 clocks = <&sim KINETIS_SIM_BUS_CLK 0x103C 12>;
265 #size-cells = <0>;
270 reg = <0x4002d000 0x88>;
272 clocks = <&sim KINETIS_SIM_BUS_CLK 0x103C 13>;
275 #size-cells = <0>;
277 pinctrl-0 = <&spi1_modem>;
280 ieee802154: mcr20a@0 {
282 reg = <0x0>;
284 irqb-gpios = <&gpiob 3 0>;
285 reset-gpios = <&gpiob 19 0>;
292 reg = <0x40052000 16>;
293 interrupts = <22 0>;
294 clocks = <&sim KINETIS_SIM_LPO_CLK 0 0>;
299 reg = <0x40038000 0x98>;
300 interrupts = <42 0>;
308 reg = <0x40039000 0x98>;
309 interrupts = <43 0>;
317 reg = <0x4003a000 0x98>;
318 interrupts = <44 0>;
326 reg = <0x4003b000 0x70>;
327 interrupts = <39 0>;
334 reg = <0x40072000 0x1000>;
343 reg = <0x40029000 0x1000>;
345 interrupts = <23 0>;