Lines Matching +full:0 +full:x1000

21 		#size-cells = <0>;
23 		cpu@0 {
26 			reg = <0>;
39 			reg = <0x4000d000 0x1000>;
45 			reg = <0x40047000 0x2000>;
52 				#clock-cells = <0>;
59 				#clock-cells = <0>;
66 				#clock-cells = <0>;
73 				#clock-cells = <0>;
79 			reg = <0x40064000 0x1000>;
85 			reg = <0x40065000 0x4>;
91 			reg = <0x40020000 0x1000>;
92 			interrupts = <18 0>, <19 0>;
101 			reg = <0x4003b000 0x1000>;
102 			interrupts = <37 0>;
110 			reg = <0x400ff000 0x40>;
120 			reg = <0x400ff040 0x40>;
130 			reg = <0x400ff080 0x40>;
140 			reg = <0x400ff0c0 0x40>;
150 			reg = <0x400ff100 0x40>;
161 			#size-cells = <0>;
162 			reg = <0x40066000 0x1000>;
163 			interrupts = <24 0>;
164 			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 6>;
172 			#size-cells = <0>;
173 			reg = <0x40067000 0x1000>;
174 			interrupts = <25 0>;
175 			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1034 7>;
181 			reg = <0x40049000 0x1000>;
182 			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>;
187 			reg = <0x4004a000 0x1000>;
188 			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>;
193 			reg = <0x4004b000 0x1000>;
194 			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>;
199 			reg = <0x4004c000 0x1000>;
200 			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>;
205 			reg = <0x4004d000 0x1000>;
206 			clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>;
211 			reg = <0x40038000 0x1000>;
212 			interrupts = <42 0>;
219 			reg = <0x40039000 0x1000>;
220 			interrupts = <43 0>;
227 			reg = <0x4003a000 0x1000>;
228 			interrupts = <53 0>;
235 			reg = <0x40026000 0x1000>;
236 			interrupts = <71 0>;
243 			reg = <0x4002c000 0x1000>;
246 			clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x103c 12>;
248 			#size-cells = <0>;
253 			reg = <0x4002d000 0x1000>;
256 			clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x103c 13>;
258 			#size-cells = <0>;
263 			reg = <0x400ac000 0x1000>;
266 			clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x1030 12>;
268 			#size-cells = <0>;
273 			reg = <0x4006a000 0x1000>;
274 			interrupts = <31 0>, <32 0>;
276 			clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x1034 10>;
282 			reg = <0x4006b000 0x1000>;
283 			interrupts = <33 0>, <34 0>;
285 			clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x1034 11>;
291 			reg = <0x4006c000 0x1000>;
292 			interrupts = <35 0>, <36 0>;
294 			clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x1034 12>;
300 			reg = <0x4006d000 0x1000>;
301 			interrupts = <44 0>, <45 0>;
303 			clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x1034 13>;
309 			reg = <0x400ea000 0x1000>;
310 			interrupts = <46 0>, <47 0>;
312 			clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x1028 10>;
318 			reg = <0x400eb000 0x1000>;
319 			interrupts = <28 0>, <29 0>;
321 			clocks = <&sim KINETIS_SIM_FAST_PERIPHERAL_CLK 0x1028 11>;