Lines Matching +full:0 +full:- +full:64

4  * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <zephyr/dt-bindings/clock/imx_ccm.h>
9 #include <zephyr/dt-bindings/rdc/imx_rdc.h>
14 		#address-cells = <1>;
15 		#size-cells = <0>;
17 		cpu@0 {
19 			compatible = "arm,cortex-m7";
20 			reg = <0>;
21 			#address-cells = <1>;
22 			#size-cells = <1>;
25 				compatible = "arm,armv7m-mpu";
26 				reg = <0xe000ed90 0x40>;
32 		itcm: itcm@0 {
33 			compatible = "nxp,imx-itcm";
34 			reg = <0x0 DT_SIZE_K(128)>;
38 			compatible = "nxp,imx-dtcm";
39 			reg = <0x20000000 DT_SIZE_K(128)>;
43 			compatible = "nxp,imx-code-bus";
44 			reg = <0x00900000 DT_SIZE_K(576)>;
49 			compatible = "nxp,imx-sys-bus";
50 			reg = <0x20200000 DT_SIZE_K(576)>;
54 			compatible = "nxp,imx-code-bus";
55 			reg = <0x00180000 DT_SIZE_K(36)>;
60 			compatible = "nxp,imx-sys-bus";
61 			reg = <0x20180000 DT_SIZE_K(36)>;
66 			compatible = "nxp,imx-code-bus";
67 			reg = <0x80000000 DT_SIZE_M(2)>;
72 			compatible = "nxp,imx-sys-bus";
73 			reg = <0x80200000 DT_SIZE_M(2)>;
77 			compatible = "nxp,imx-ccm";
78 			reg = <0x30380000 DT_SIZE_K(64)>;
79 			#clock-cells = <3>;
83 			compatible = "nxp,imx-iomuxc";
84 			reg = <0x30330000 DT_SIZE_K(64)>;
88 				compatible = "nxp,imx8mp-pinctrl";
93 			compatible = "nxp,imx-gpio";
94 			reg = <0x30200000 DT_SIZE_K(64)>;
95 			interrupts = <64 0>, <65 0>;
100 			gpio-controller;
101 			#gpio-cells = <2>;
106 			compatible = "nxp,imx-gpio";
107 			reg = <0x30210000 DT_SIZE_K(64)>;
108 			interrupts = <66 0>, <67 0>;
113 			gpio-controller;
114 			#gpio-cells = <2>;
119 			compatible = "nxp,imx-gpio";
120 			reg = <0x30220000 DT_SIZE_K(64)>;
121 			interrupts = <68 0>, <69 0>;
126 			gpio-controller;
127 			#gpio-cells = <2>;
132 			compatible = "nxp,imx-gpio";
133 			reg = <0x30230000 DT_SIZE_K(64)>;
134 			interrupts = <70 0>, <71 0>;
139 			gpio-controller;
140 			#gpio-cells = <2>;
145 			compatible = "nxp,imx-gpio";
146 			reg = <0x30240000 DT_SIZE_K(64)>;
147 			interrupts = <72 0>, <73 0>;
152 			gpio-controller;
153 			#gpio-cells = <2>;
158 			compatible = "nxp,imx-iuart";
159 			reg = <0x30a60000 0x10000>;
161 			clocks = <&ccm IMX_CCM_UART4_CLK 0x6c 24>;
166 			compatible = "nxp,imx-iuart";
167 			reg = <0x30860000 0x10000>;
169 			clocks = <&ccm IMX_CCM_UART1_CLK 0x7c 24>;
174 			compatible = "nxp,imx-mu";
175 			reg = <0x30ab0000 DT_SIZE_K(64)>;
176 			interrupts = <97 0>;
185 			compatible = "nxp,imx-ecspi";
186 			reg = <0x30820000 DT_SIZE_K(64)>;
187 			#address-cells = <1>;
188 			#size-cells = <0>;
190 			clocks = <&ccm IMX_CCM_ECSPI1_CLK 0 0>;
195 			compatible = "nxp,imx-ecspi";
196 			reg = <0x30830000 DT_SIZE_K(64)>;
197 			#address-cells = <1>;
198 			#size-cells = <0>;
200 			clocks = <&ccm IMX_CCM_ECSPI2_CLK 0 0>;
205 			compatible = "nxp,imx-ecspi";
206 			reg = <0x30840000 DT_SIZE_K(64)>;
207 			#address-cells = <1>;
208 			#size-cells = <0>;
210 			clocks = <&ccm IMX_CCM_ECSPI3_CLK 0 0>;
217 	arm,num-irq-priority-bits = <4>;