Lines Matching +full:0 +full:x40024000
27 #size-cells = <0>;
29 cpu@0 {
32 reg = <0>;
38 reg = <0x20000000 DT_SIZE_K(512)>;
44 #clock-cells = <0>;
50 reg = <0x40000200 0x100>;
51 #clock-cells = <0>;
68 reg = <0x40000000 0x20>;
75 reg = <0x4000c000 0x110>;
79 flash0: flash@0 {
81 reg = <0 DT_SIZE_K(1024)>;
89 reg = <0x40070000 0x1000>;
90 interrupts = <36 0>;
99 reg = <0x40071000 0x1000>;
100 interrupts = <37 0>;
109 reg = <0x40072000 0x1000>;
110 interrupts = <48 0>;
119 reg = <0x40073000 0x1000>;
120 interrupts = <49 0>;
129 reg = <0x40074000 0x1000>;
130 interrupts = <74 0>;
139 reg = <0x40075000 0x1000>;
140 interrupts = <75 0>;
149 reg = <0x40076000 0x1000>;
150 interrupts = <102 0>;
159 reg = <0x40077000 0x1000>;
160 interrupts = <103 0>;
169 reg = <0x40078000 0x1000>;
170 interrupts = <99 0>;
179 reg = <0x40079000 0x1000>;
180 interrupts = <100 0>;
189 reg = <0x40000080 0x28
190 0x40000500 0xa0>;
199 reg = <0x40004000 0x40>;
200 clocks = <&pcc NUMAKER_GPA_MODULE 0 0>;
209 reg = <0x40004040 0x40>;
210 clocks = <&pcc NUMAKER_GPB_MODULE 0 0>;
219 reg = <0x40004080 0x40>;
220 clocks = <&pcc NUMAKER_GPC_MODULE 0 0>;
229 reg = <0x400040c0 0x40>;
230 clocks = <&pcc NUMAKER_GPD_MODULE 0 0>;
239 reg = <0x40004100 0x40>;
240 clocks = <&pcc NUMAKER_GPE_MODULE 0 0>;
249 reg = <0x40004140 0x40>;
250 clocks = <&pcc NUMAKER_GPF_MODULE 0 0>;
259 reg = <0x40004180 0x40>;
260 clocks = <&pcc NUMAKER_GPG_MODULE 0 0>;
269 reg = <0x400041c0 0x40>;
270 clocks = <&pcc NUMAKER_GPH_MODULE 0 0>;
279 reg = <0x40004200 0x40>;
280 clocks = <&pcc NUMAKER_GPI_MODULE 0 0>;
289 reg = <0x40004240 0x40>;
290 clocks = <&pcc NUMAKER_GPJ_MODULE 0 0>;
297 reg = <0x40061000 0x6c>;
298 interrupts = <23 0>;
300 clocks = <&pcc NUMAKER_SPI0_MODULE NUMAKER_CLK_CLKSEL2_SPI0SEL_HIRC 0>;
302 #size-cells = <0>;
308 reg = <0x40062000 0x6c>;
309 interrupts = <51 0>;
311 clocks = <&pcc NUMAKER_SPI1_MODULE NUMAKER_CLK_CLKSEL2_SPI1SEL_HIRC 0>;
313 #size-cells = <0>;
319 reg = <0x40063000 0x6c>;
320 interrupts = <52 0>;
322 clocks = <&pcc NUMAKER_SPI2_MODULE NUMAKER_CLK_CLKSEL3_SPI2SEL_HIRC 0>;
324 #size-cells = <0>;
330 reg = <0x40064000 0x6c>;
331 interrupts = <62 0>;
333 clocks = <&pcc NUMAKER_SPI3_MODULE NUMAKER_CLK_CLKSEL3_SPI3SEL_HIRC 0>;
335 #size-cells = <0>;
341 reg = <0x40065000 0x6c>;
342 interrupts = <63 0>;
344 clocks = <&pcc NUMAKER_SPI4_MODULE NUMAKER_CLK_CLKSEL4_SPI4SEL_HIRC 0>;
346 #size-cells = <0>;
352 reg = <0x40066000 0x6c>;
353 interrupts = <57 0>;
355 clocks = <&pcc NUMAKER_SPI5_MODULE NUMAKER_CLK_CLKSEL4_SPI5SEL_HIRC 0>;
357 #size-cells = <0>;
363 reg = <0x40067000 0x6c>;
364 interrupts = <70 0>;
366 clocks = <&pcc NUMAKER_SPI6_MODULE NUMAKER_CLK_CLKSEL4_SPI6SEL_HIRC 0>;
368 #size-cells = <0>;
374 reg = <0x40068000 0x6c>;
375 interrupts = <77 0>;
377 clocks = <&pcc NUMAKER_SPI7_MODULE NUMAKER_CLK_CLKSEL4_SPI7SEL_HIRC 0>;
379 #size-cells = <0>;
385 reg = <0x4006b000 0x6c>;
386 interrupts = <108 0>;
388 clocks = <&pcc NUMAKER_SPI8_MODULE NUMAKER_CLK_CLKSEL4_SPI8SEL_HIRC 0>;
390 #size-cells = <0>;
396 reg = <0x4006c000 0x6c>;
397 interrupts = <111 0>;
399 clocks = <&pcc NUMAKER_SPI9_MODULE NUMAKER_CLK_CLKSEL4_SPI9SEL_HIRC 0>;
401 #size-cells = <0>;
407 reg = <0x4006d000 0x6c>;
408 interrupts = <119 0>;
410 clocks = <&pcc NUMAKER_SPI10_MODULE NUMAKER_CLK_CLKSEL4_SPI10SEL_HIRC 0>;
412 #size-cells = <0>;
418 reg = <0x40058000 0x37c>;
419 interrupts = <25 0>, <26 0>, <27 0>;
423 clocks = <&pcc NUMAKER_EPWM0_MODULE NUMAKER_CLK_CLKSEL2_EPWM0SEL_PCLK0 0>;
430 reg = <0x40059000 0x37c>;
431 interrupts = <29 0>, <30 0>, <31 0>;
435 clocks = <&pcc NUMAKER_EPWM1_MODULE NUMAKER_CLK_CLKSEL2_EPWM1SEL_PCLK1 0>;
442 reg = <0x40020000 0x200>, <0x40020200 0x1800>;
444 interrupts = <112 0>, <113 0>;
450 bosch,mram-cfg = <0x0 12 10 3 3 3 3 3>;
456 reg = <0x40024000 0x200>, <0x40024200 0x1800>;
458 interrupts = <114 0>, <115 0>;
464 bosch,mram-cfg = <0x0 12 10 3 3 3 3 3>;
470 reg = <0x40028000 0x200>, <0x40028200 0x1800>;
472 interrupts = <120 0>, <121 0>;
478 bosch,mram-cfg = <0x0 12 10 3 3 3 3 3>;
484 reg = <0x4002c000 0x200>, <0x4002c200 0x1800>;
486 interrupts = <122 0>, <123 0>;
492 bosch,mram-cfg = <0x0 12 10 3 3 3 3 3>;
498 reg = <0x40012000 0x105C>;
499 interrupts = <66 0>;
502 clocks = <&pcc NUMAKER_EMAC0_MODULE 0 0>;
509 reg = <0x40080000 0x1000>;
510 interrupts = <38 0>;
512 clocks = <&pcc NUMAKER_I2C0_MODULE 0 0>;
515 #size-cells = <0>;
521 reg = <0x40081000 0x1000>;
522 interrupts = <39 0>;
524 clocks = <&pcc NUMAKER_I2C1_MODULE 0 0>;
527 #size-cells = <0>;
533 reg = <0x40082000 0x1000>;
534 interrupts = <82 0>;
536 clocks = <&pcc NUMAKER_I2C2_MODULE 0 0>;
539 #size-cells = <0>;
545 reg = <0x40083000 0x1000>;
546 interrupts = <83 0>;
548 clocks = <&pcc NUMAKER_I2C3_MODULE 0 0>;
551 #size-cells = <0>;
557 reg = <0x40084000 0x1000>;
558 interrupts = <118 0>;
560 clocks = <&pcc NUMAKER_I2C4_MODULE 0 0>;
563 #size-cells = <0>;
568 reg = <0x40043000 0xffc>;
569 interrupts = <42 0>;
581 reg = <0x4004b000 0xffc>;
582 interrupts = <104 0>;
594 reg = <0x40097000 0xffc>;
595 interrupts = <124 0>;
607 reg = <0x400c0000 0x1000>;
608 interrupts = <53 0>;
620 reg = <0x40040100 0x10>;
621 interrupts = <9 0>;
622 clocks = <&pcc NUMAKER_WWDT_MODULE NUMAKER_CLK_CLKSEL1_WWDTSEL_LIRC 0>;
628 reg = <0x40041000 0x138>;
629 interrupts = <6 0>;
631 clocks = <&pcc NUMAKER_RTC_MODULE 0 0>;