Lines Matching +full:0 +full:x40024000
21 #size-cells = <0>;
23 cpu@0 {
26 reg = <0>;
32 reg = <0xe0000000 0x1000>;
41 reg = <0x10000000 0x1000>;
48 reg = <0x10001000 0x1000>;
58 reg = <0x40000000 0x1000>;
59 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
65 reg = <0x40000000 0x1000>;
66 interrupts = <0 NRF_DEFAULT_IRQ_PRIORITY>;
75 reg = <0x4000051c 0x1>;
83 reg = <0x40000520 0x1>;
89 reg = <0x40000578 0x1>;
96 reg = <0x40000580 0x1>;
104 reg = <0x40001000 0x1000>;
131 reg = <0x40002000 0x1000>;
146 #size-cells = <0>;
147 reg = <0x40003000 0x1000>;
164 #size-cells = <0>;
165 reg = <0x40003000 0x1000>;
182 #size-cells = <0>;
183 reg = <0x40004000 0x1000>;
200 #size-cells = <0>;
201 reg = <0x40004000 0x1000>;
210 reg = <0x40005000 0x1000>;
217 reg = <0x40006000 0x1000>;
220 instance = <0>;
225 reg = <0x40007000 0x1000>;
234 reg = <0x40008000 0x1000>;
238 prescaler = <0>;
244 reg = <0x40009000 0x1000>;
248 prescaler = <0>;
254 reg = <0x4000a000 0x1000>;
258 prescaler = <0>;
263 reg = <0x4000b000 0x1000>;
273 reg = <0x4000c000 0x1000>;
280 reg = <0x4000d000 0x1000>;
287 reg = <0x4000e000 0x1000>;
294 reg = <0x4000f000 0x1000>;
303 reg = <0x40010000 0x1000>;
310 reg = <0x40011000 0x1000>;
320 reg = <0x40012000 0x1000>;
331 reg = <0x40013000 0x1000>;
338 reg = <0x40014000 0x1000>;
345 reg = <0x40015000 0x1000>;
352 reg = <0x40016000 0x1000>;
359 reg = <0x40017000 0x1000>;
366 reg = <0x40018000 0x1000>;
373 reg = <0x40019000 0x1000>;
381 reg = <0x4001a000 0x1000>;
385 prescaler = <0>;
391 reg = <0x4001b000 0x1000>;
395 prescaler = <0>;
400 reg = <0x4001c000 0x1000>;
408 reg = <0x4001d000 0x1000>;
415 reg = <0x4001e000 0x1000>;
421 reg = <0x4001e000 0x1000>;
428 flash0: flash@0 {
437 reg = <0x4001f000 0x1000>;
443 reg = <0x40020000 0x1000>;
449 reg = <0x40021000 0x1000>;
457 reg = <0x40022000 0x1000>;
473 #size-cells = <0>;
474 reg = <0x40023000 0x1000>;
483 reg = <0x40024000 0x1000>;
494 #size-cells = <0>;
495 reg = <0x40025000 0x1000>;
502 reg = <0x40027000 0x1000>;
514 reg = <0x40028000 0x1000>;
521 reg = <0x4002d000 0x1000>;
530 #size-cells = <0>;
531 reg = <0x4002f000 0x1000>;
543 reg = <0x50000000 0x200
544 0x50000500 0x300>;
547 port = <0>;
554 reg = <0x50000300 0x200
555 0x50000800 0x300>;