Lines Matching +full:interrupt +full:- +full:capable
4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv7-m.dtsi>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
9 #include <zephyr/dt-bindings/gpio/microchip-xec-gpio.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-m4";
32 reg-names = "pcrr", "vbatr";
38 #address-cells = <1>;
39 #size-cells = <1>;
140 pinctrl: pin-controller@40081000 {
141 compatible = "microchip,mec5-pinctrl";
142 #address-cells = <1>;
143 #size-cells = <1>;
147 compatible = "microchip,mec5-gpio";
151 gpio-controller;
152 #gpio-cells=<2>;
155 compatible = "microchip,mec5-gpio";
159 gpio-controller;
160 #gpio-cells=<2>;
163 compatible = "microchip,mec5-gpio";
166 gpio-controller;
168 #gpio-cells=<2>;
171 compatible = "microchip,mec5-gpio";
174 gpio-controller;
176 #gpio-cells=<2>;
179 compatible = "microchip,mec5-gpio";
182 gpio-controller;
184 #gpio-cells=<2>;
187 compatible = "microchip,mec5-gpio";
190 gpio-controller;
192 #gpio-cells=<2>;
213 clock-frequency = <32768>;
214 max-value = <0xffffffff>;
220 clock-frequency = <48000000>;
222 max-value = <0xffff>;
228 clock-frequency = <48000000>;
230 max-value = <0xffff>;
236 clock-frequency = <48000000>;
238 max-value = <0xffff>;
244 clock-frequency = <48000000>;
246 max-value = <0xffff>;
252 clock-frequency = <48000000>;
254 max-value = <0xffffffff>;
260 clock-frequency = <48000000>;
262 max-value = <0xffffffff>;
313 bbram: bb-ram@4000a800 {
315 reg-names = "memory";
326 clock-frequency = <I2C_BITRATE_STANDARD>;
328 #address-cells = <1>;
329 #size-cells = <0>;
334 clock-frequency = <I2C_BITRATE_STANDARD>;
336 #address-cells = <1>;
337 #size-cells = <0>;
342 clock-frequency = <I2C_BITRATE_STANDARD>;
344 #address-cells = <1>;
345 #size-cells = <0>;
350 clock-frequency = <I2C_BITRATE_STANDARD>;
352 #address-cells = <1>;
353 #size-cells = <0>;
358 clock-frequency = <I2C_BITRATE_STANDARD>;
360 #address-cells = <1>;
361 #size-cells = <0>;
367 #address-cells = <1>;
368 #size-cells = <0>;
374 #pwm-cells = <3>;
379 #pwm-cells = <3>;
384 #pwm-cells = <3>;
389 #pwm-cells = <3>;
394 #pwm-cells = <3>;
399 #pwm-cells = <3>;
404 #pwm-cells = <3>;
409 #pwm-cells = <3>;
414 #pwm-cells = <3>;
419 #address-cells = <1>;
420 #size-cells = <0>;
426 #address-cells = <1>;
427 #size-cells = <0>;
433 #address-cells = <1>;
434 #size-cells = <0>;
440 #address-cells = <1>;
441 #size-cells = <0>;
457 interrupt-names = "single", "repeat";
459 #io-channel-cells = <1>;
465 #address-cells = <1>;
466 #size-cells = <0>;
472 clock-frequency = <12000000>;
473 #address-cells = <1>;
474 #size-cells = <0>;
531 #address-cells = <1>;
532 #size-cells = <1>;
536 reg-names = "io", "mem", "vw";
540 interrupt-names = "pc", "bm1", "bm2", "ltr", "oob_up",
546 * Some devices are capable of having their registers mapped to
547 * Host I/O or memory address space. Some devices are capable
558 interrupt-names = "ibf", "obe";
564 interrupt-names = "ibf", "obe";
570 interrupt-names = "ibf", "obe";
576 interrupt-names = "ibf", "obe";
582 interrupt-names = "ibf", "obe";
588 interrupt-names = "ibf", "obe";
594 interrupt-names = "ctl", "en", "sts";
617 /* Capture Host writes to a 4-byte I/O range
619 * to one of the 4-byte locations.
634 reg-names = "tafbr", "tafqspi", "tafcomm";
636 interrupt-names = "done", "err";
643 arm,num-irq-priority-bits = <3>;