Lines Matching +full:0 +full:- +full:3
4 * SPDX-License-Identifier: Apache-2.0
8 reg = <0x4000fc00 0x200>;
11 compatible = "microchip,xec-pcr";
12 reg = <0x40080100 0x100 0x4000a400 0x100>;
13 reg-names = "pcrr", "vbatr";
14 interrupts = <174 0>;
15 core-clock-div = <1>;
17 pll-32k-src = <MCHP_XEC_PLL_CLK32K_SRC_SIL_OSC>;
18 periph-32k-src = <MCHP_XEC_PERIPH_CLK32K_SRC_SO_SO>;
19 clk32kmon-period-min = <1435>;
20 clk32kmon-period-max = <1495>;
21 clk32kmon-duty-cycle-var-max = <132>;
22 clk32kmon-valid-min = <4>;
23 xtal-enable-delay-ms = <300>;
24 pll-lock-timeout-ms = <30>;
25 #clock-cells = <3>;
28 compatible = "microchip,xec-ecia";
29 reg = <0x4000e000 0x400>;
30 direct-capable-girqs = <13 14 15 16 17 18 19 20 21 23>;
31 clocks = <&pcr 1 0 MCHP_XEC_PCR_CLK_PERIPH>;
32 #address-cells = <1>;
33 #size-cells = <1>;
35 ranges = <0x0 0x4000e000 0x400>;
37 girq8: girq8@0 {
38 compatible = "microchip,xec-ecia-girq";
39 reg = <0x0 0x14>;
40 interrupts = <0 0>;
41 girq-id = <0>;
42 sources = <0 1 2 3 4 5 6 7
49 compatible = "microchip,xec-ecia-girq";
50 reg = <0x14 0x14>;
51 interrupts = <1 0>;
52 girq-id = <1>;
53 sources = <0 1 2 3 4 5 6 7
60 compatible = "microchip,xec-ecia-girq";
61 reg = <0x28 0x14>;
62 interrupts = <2 0>;
63 girq-id = <2>;
64 sources = <0 1 2 3 4 5 6 7
70 girq11: girq11@3c {
71 compatible = "microchip,xec-ecia-girq";
72 reg = <0x3c 0x14>;
73 interrupts = <3 0>;
74 girq-id = <3>;
75 sources = <0 1 2 3 4 5 6 7
82 compatible = "microchip,xec-ecia-girq";
83 reg = <0x50 0x14>;
84 interrupts = <4 0>;
85 girq-id = <4>;
86 sources = <0 1 2 3 4 5 6 7
93 compatible = "microchip,xec-ecia-girq";
94 reg = <0x64 0x14>;
95 interrupts = <5 0>;
96 girq-id = <5>;
97 sources = <0 1 2 3 4>;
101 compatible = "microchip,xec-ecia-girq";
102 reg = <0x78 0x14>;
103 interrupts = <6 0>;
104 girq-id = <6>;
105 sources = <0 1 2 3 4 5 6 7
110 compatible = "microchip,xec-ecia-girq";
111 reg = <0x8c 0x14>;
112 interrupts = <7 0>;
113 girq-id = <7>;
114 sources = <0 1 2 3 4 5 6 7
120 compatible = "microchip,xec-ecia-girq";
121 reg = <0xa0 0x14>;
122 interrupts = <8 0>;
123 girq-id = <8>;
124 sources = <0 2 3>;
128 compatible = "microchip,xec-ecia-girq";
129 reg = <0xb4 0x14>;
130 interrupts = <9 0>;
131 girq-id = <9>;
132 sources = <0 1 2 3 4 8 9 10 11 12 13 14 15
137 compatible = "microchip,xec-ecia-girq";
138 reg = <0xc8 0x14>;
139 interrupts = <10 0>;
140 girq-id = <10>;
141 sources = <0 1 2 3 4 5 6 7
147 compatible = "microchip,xec-ecia-girq";
148 reg = <0xdc 0x14>;
149 interrupts = <11 0>;
150 girq-id = <11>;
151 sources = <0 1 2 3 4 5 6 7 8 9 10>;
155 compatible = "microchip,xec-ecia-girq";
156 reg = <0xf0 0x14>;
157 interrupts = <12 0>;
158 girq-id = <12>;
159 sources = <3 9>;
163 compatible = "microchip,xec-ecia-girq";
164 reg = <0x104 0x14>;
165 interrupts = <13 0>;
166 girq-id = <13>;
167 sources = <2 3 4 5 6 7 8 9 10 11 12 13 14 15
172 compatible = "microchip,xec-ecia-girq";
173 reg = <0x118 0x14>;
174 interrupts = <255 0>;
175 girq-id = <14>;
176 sources = <0 1 2 3 4 5 9 15>;
180 compatible = "microchip,xec-ecia-girq";
181 reg = <0x12c 0x14>;
182 interrupts = <14 0>;
183 girq-id = <15>;
184 sources = <0 1 2 3 4 5 6 7 8 9 10 16 17>;
188 compatible = "microchip,xec-ecia-girq";
189 reg = <0x140 0x14>;
190 interrupts = <15 0>;
191 girq-id = <16>;
192 sources = <0 1 2 3 4 5 6 7 8 9 10 11
198 compatible = "microchip,xec-ecia-girq";
199 reg = <0x154 0x14>;
200 interrupts = <16 0>;
201 girq-id = <17>;
202 sources = <0 1 2 3 4 5 6 7 8 9 10 11
207 compatible = "microchip,xec-ecia-girq";
208 reg = <0x168 0x14>;
209 interrupts = <17 0>;
210 girq-id = <18>;
211 sources = <0 1 2 3 4 5 6 12 13>;
215 pinctrl: pin-controller@40081000 {
216 compatible = "microchip,xec-pinctrl";
217 #address-cells = <1>;
218 #size-cells = <1>;
219 reg = <0x40081000 0x1000>;
222 compatible = "microchip,xec-gpio-v2";
223 reg = < 0x40081000 0x80 0x40081300 0x04
224 0x40081380 0x04 0x400813fc 0x04>;
225 interrupts = <3 2>;
226 gpio-controller;
227 port-id = <0>;
228 girq-id = <11>;
229 #gpio-cells=<2>;
232 compatible = "microchip,xec-gpio-v2";
233 reg = < 0x40081080 0x80 0x40081304 0x04
234 0x40081384 0x04 0x400813f8 0x4>;
236 gpio-controller;
237 port-id = <1>;
238 girq-id = <10>;
239 #gpio-cells=<2>;
242 compatible = "microchip,xec-gpio-v2";
243 reg = < 0x40081100 0x80 0x40081308 0x04
244 0x40081388 0x04 0x400813f4 0x04>;
245 gpio-controller;
247 port-id = <2>;
248 girq-id = <9>;
249 #gpio-cells=<2>;
252 compatible = "microchip,xec-gpio-v2";
253 reg = < 0x40081180 0x80 0x4008130c 0x04
254 0x4008138c 0x04 0x400813f0 0x04>;
255 gpio-controller;
256 interrupts = <0 2>;
257 port-id = <3>;
258 girq-id = <8>;
259 #gpio-cells=<2>;
262 compatible = "microchip,xec-gpio-v2";
263 reg = < 0x40081200 0x80 0x40081310 0x04
264 0x40081390 0x04 0x400813ec 0x04>;
265 gpio-controller;
267 port-id = <4>;
268 girq-id = <12>;
269 #gpio-cells=<2>;
272 compatible = "microchip,xec-gpio-v2";
273 reg = < 0x40081280 0x80 0x40081314 0x04
274 0x40081394 0x04 0x400813e8 0x04>;
275 gpio-controller;
277 port-id = <5>;
278 girq-id = <26>;
279 #gpio-cells=<2>;
283 compatible = "microchip,xec-watchdog";
284 reg = <0x40000400 0x400>;
285 interrupts = <171 0>;
290 compatible = "microchip,xec-rtos-timer";
291 reg = <0x40007400 0x10>;
292 interrupts = <111 0>;
296 compatible = "microchip,xec-timer";
297 clock-frequency = <48000000>;
298 reg = <0x40000c00 0x20>;
299 interrupts = <136 0>;
300 girqs = <23 0>;
302 max-value = <0xFFFF>;
303 prescaler = <0>;
307 compatible = "microchip,xec-timer";
308 clock-frequency = <48000000>;
309 reg = <0x40000c20 0x20>;
310 interrupts = <137 0>;
313 max-value = <0xFFFF>;
314 prescaler = <0>;
318 compatible = "microchip,xec-timer";
319 clock-frequency = <48000000>;
320 reg = <0x40000c40 0x20>;
321 interrupts = <138 0>;
323 pcrs = <3 21>;
324 max-value = <0xFFFF>;
325 prescaler = <0>;
329 compatible = "microchip,xec-timer";
330 clock-frequency = <48000000>;
331 reg = <0x40000c60 0x20>;
332 interrupts = <139 0>;
333 girqs = <23 3>;
334 pcrs = <3 22>;
335 max-value = <0xFFFF>;
336 prescaler = <0>;
345 compatible = "microchip,xec-timer";
346 clock-frequency = <48000000>;
347 reg = <0x40000c80 0x20>;
348 interrupts = <140 0>;
350 pcrs = <3 23>;
351 max-value = <0xFFFFFFFF>;
352 prescaler = <0>;
356 compatible = "microchip,xec-timer";
357 clock-frequency = <48000000>;
358 reg = <0x40000ca0 0x20>;
359 interrupts = <141 0>;
361 pcrs = <3 24>;
362 max-value = <0xFFFFFFFF>;
363 prescaler = <0>;
367 reg = <0x40000d00 0x20>;
368 interrupts = <142 0>;
374 reg = <0x40000d20 0x20>;
375 interrupts = <143 0>;
377 pcrs = <4 3>;
381 reg = <0x40000d40 0x20>;
382 interrupts = <144 0>;
384 pcrs = <4 3>;
388 reg = <0x40000d60 0x20>;
389 interrupts = <145 0>;
395 reg = <0x40001000 0x40>;
396 interrupts = <146 0>, <147 0>, <148 0>, <149 0>,
397 <150 0>, <151 0>, <152 0>, <153 0>,
398 <154 0>;
401 pcrs = <3 30>;
405 reg = <0x40009800 0x20>;
406 interrupts = <112 0>;
410 reg = <0x40009820 0x20>;
411 interrupts = <113 0>;
415 reg = <0x4000ac80 0x80>;
416 interrupts = <114 0>, <115 0>, <116 0>,
417 <117 0>, <118 0>;
418 girqs = <21 3>, <21 4>, <21 5>, <21 6>, <21 7>;
421 bbram: bb-ram@4000a800 {
422 compatible = "microchip,xec-bbram";
423 reg = <0x4000a800 0x100>;
424 reg-names = "memory";
427 reg = <0x4000ae00 0x40>;
428 interrupts = <121 0>, <122 0>, <123 0>,
429 <124 0>, <125 0>;
434 compatible = "microchip,xec-dmac";
435 reg = <0x40002400 0xc00>;
440 girqs = < MCHP_XEC_ECIA(14, 0, 6, 24)
443 MCHP_XEC_ECIA(14, 3, 6, 27)
457 #dma-cells = <2>;
458 dma-channels = <16>;
459 dma-requests = <16>;
463 compatible = "microchip,xec-i2c-v2";
464 reg = <0x40004000 0x80>;
465 clock-frequency = <I2C_BITRATE_STANDARD>;
467 girqs = <13 0>;
469 #address-cells = <1>;
470 #size-cells = <0>;
474 compatible = "microchip,xec-i2c-v2";
475 reg = <0x40004400 0x80>;
476 clock-frequency = <I2C_BITRATE_STANDARD>;
479 pcrs = <3 13>;
480 #address-cells = <1>;
481 #size-cells = <0>;
485 compatible = "microchip,xec-i2c-v2";
486 reg = <0x40004800 0x80>;
487 clock-frequency = <I2C_BITRATE_STANDARD>;
490 pcrs = <3 14>;
491 #address-cells = <1>;
492 #size-cells = <0>;
496 compatible = "microchip,xec-i2c-v2";
497 reg = <0x40004C00 0x80>;
498 clock-frequency = <I2C_BITRATE_STANDARD>;
500 girqs = <13 3>;
501 pcrs = <3 15>;
502 #address-cells = <1>;
503 #size-cells = <0>;
507 compatible = "microchip,xec-i2c-v2";
508 reg = <0x40005000 0x80>;
509 clock-frequency = <I2C_BITRATE_STANDARD>;
512 pcrs = <3 20>;
513 #address-cells = <1>;
514 #size-cells = <0>;
518 compatible = "microchip,xec-ps2";
519 reg = <0x40009000 0x40>;
522 pcrs = <3 5>;
523 #address-cells = <1>;
524 #size-cells = <0>;
528 compatible = "microchip,xec-pwm";
529 reg = <0x40005800 0x20>;
532 #pwm-cells = <3>;
535 compatible = "microchip,xec-pwm";
536 reg = <0x40005810 0x20>;
539 #pwm-cells = <3>;
542 compatible = "microchip,xec-pwm";
543 reg = <0x40005820 0x20>;
546 #pwm-cells = <3>;
549 compatible = "microchip,xec-pwm";
550 reg = <0x40005830 0x20>;
553 #pwm-cells = <3>;
556 compatible = "microchip,xec-pwm";
557 reg = <0x40005840 0x20>;
560 #pwm-cells = <3>;
563 compatible = "microchip,xec-pwm";
564 reg = <0x40005850 0x20>;
567 #pwm-cells = <3>;
570 compatible = "microchip,xec-pwm";
571 reg = <0x40005860 0x20>;
574 #pwm-cells = <3>;
577 compatible = "microchip,xec-pwm";
578 reg = <0x40005870 0x20>;
581 #pwm-cells = <3>;
584 compatible = "microchip,xec-pwm";
585 reg = <0x40005880 0x20>;
588 #pwm-cells = <3>;
591 compatible = "microchip,xec-tach";
592 reg = <0x40006000 0x10>;
596 #address-cells = <1>;
597 #size-cells = <0>;
601 compatible = "microchip,xec-tach";
602 reg = <0x40006010 0x10>;
606 #address-cells = <1>;
607 #size-cells = <0>;
611 compatible = "microchip,xec-tach";
612 reg = <0x40006020 0x10>;
614 girqs = <17 3>;
616 #address-cells = <1>;
617 #size-cells = <0>;
621 compatible = "microchip,xec-tach";
622 reg = <0x40006030 0x10>;
626 #address-cells = <1>;
627 #size-cells = <0>;
631 reg = <0x4000a000 0x80>;
634 pcrs = <3 12>;
638 reg = <0x4000a080 0x80>;
645 compatible = "microchip,xec-adc";
646 reg = <0x40007c00 0x90>;
647 interrupts = <78 0>, <79 0>;
649 pcrs = <3 3>;
651 #io-channel-cells = <1>;
656 compatible = "microchip,xec-kbd";
657 reg = <0x40009c00 0x18>;
658 interrupts = <135 0>;
660 pcrs = <3 11>;
662 #address-cells = <1>;
663 #size-cells = <0>;
666 compatible = "microchip,xec-peci";
667 reg = <0x40006400 0x80>;
669 girqs = <17 0>;
671 #address-cells = <1>;
672 #size-cells = <0>;
675 reg = <0x40070000 0x400>;
679 clock-frequency = <12000000>;
681 chip-select = <0>;
682 #address-cells = <1>;
683 #size-cells = <0>;
687 reg = <0x40009400 0x80>;
689 girqs = <18 2>, <18 3>;
690 pcrs = <3 9>;
694 reg = <0x40009480 0x80>;
701 reg = <0x40003400 0x20>;
702 interrupts = <87 0>;
708 reg = <0x40001400 0x80>;
709 interrupts = <80 0>;
715 reg = <0x40001480 0x80>;
716 interrupts = <81 0>;
722 reg = <0x40001500 0x80>;
723 interrupts = <82 0>;
729 reg = <0x40007000 0x100>;
730 interrupts = <90 0>;
731 girqs = <18 0>;
736 reg = <0x4000b800 0x100>;
737 interrupts = <83 0>;
739 pcrs = <3 16>;
743 reg = <0x4000b900 0x100>;
744 interrupts = <84 0>;
746 pcrs = <3 17>;
750 reg = <0x4000ba00 0x100>;
751 interrupts = <85 0>;
753 pcrs = <3 18>;
757 reg = <0x4000bb00 0x100>;
758 interrupts = <86 0>;
760 pcrs = <3 25>;
764 reg = <0x4000cd00 0x20>;
765 interrupts = <96 0>, <97 0>;
767 pcrs = <3 19>;
771 reg = <0x40008c00 0x10>;
776 reg = <0x400fff00 0x40>;
781 compatible = "microchip,xec-uart";
782 reg = <0x400f2400 0x400>;
784 clock-frequency = <1843200>;
785 current-speed = <38400>;
786 girqs = <15 0>;
792 compatible = "microchip,xec-uart";
793 reg = <0x400f2800 0x400>;
795 clock-frequency = <1843200>;
796 current-speed = <38400>;
803 compatible = "microchip,xec-espi-v2";
804 /* reg tuple contains one 32-bit address cell and one
805 * 32-bit length(size) cell.
807 #address-cells = <1>;
808 #size-cells = <1>;
809 reg = < 0x400f3400 0x400
810 0x400f3800 0x400
811 0x400f9c00 0x400>;
812 reg-names = "io", "mem", "vw";
813 interrupts = <103 3>, <104 3>, <105 3>, <106 3>,
814 <107 3>, <108 3>, <109 3>, <110 2>,
815 <156 3>;
816 interrupt-names = "pc", "bm1", "bm2", "ltr", "oob_up",
818 girqs = < MCHP_XEC_ECIA(19, 0, 11, 103)
821 MCHP_XEC_ECIA(19, 3, 11, 106)
831 compatible = "microchip,xec-espi-saf-v2";
832 reg = <0x40008000 0x400>, <0x40070000 0x400>,
833 <0x40071000 0x400>;
834 reg-names = "safbr", "safqspi", "safcomm";
835 interrupts = <166 3>, <167 3>;
836 interrupt-names = "done", "err";
844 compatible = "microchip,xec-espi-host-dev";
845 reg = <0x400f0000 0x200>;
846 interrupts = <60 3>;
849 ldn = <0>;
853 compatible = "microchip,xec-espi-host-dev";
854 reg = <0x400f0400 0x400>;
855 interrupts = <58 3>, <59 3>;
856 interrupt-names = "kbc_obe", "kbc_ibf";
863 compatible = "microchip,xec-espi-host-dev";
864 reg = <0x400f0800 0x400>;
865 interrupts = <45 3>, <46 3>;
866 interrupt-names = "acpi_ibf", "acpi_obe";
873 compatible = "microchip,xec-espi-host-dev";
874 reg = <0x400f0c00 0x400>;
875 interrupts = <47 3>, <48 3>;
876 interrupt-names = "acpi_ibf", "acpi_obe";
879 ldn = <3>;
883 compatible = "microchip,xec-espi-host-dev";
884 reg = <0x400f1000 0x400>;
885 interrupts = <49 3>, <50 3>;
886 interrupt-names = "acpi_ibf", "acpi_obe";
893 compatible = "microchip,xec-espi-host-dev";
894 reg = <0x400f1400 0x400>;
895 interrupts = <51 3>, <52 3>;
896 interrupt-names = "acpi_ibf", "acpi_obe";
903 compatible = "microchip,xec-espi-host-dev";
904 reg = <0x400f1800 0x400>;
905 interrupts = <53 3>, <54 3>;
906 interrupt-names = "acpi_ibf", "acpi_obe";
913 compatible = "microchip,xec-espi-host-dev";
914 reg = <0x400f1c00 0x400>;
915 interrupts = <55 3>, <56 3>, <57 3>;
916 interrupt-names = "pm1_ctl", "pm1_en", "pm1_sts";
924 compatible = "microchip,xec-espi-host-dev";
925 reg = <0x400f2000 0x400>;
930 compatible = "microchip,xec-espi-host-dev";
931 reg = <0x400f4000 0x400>;
932 interrupts = <42 3>;
938 compatible = "microchip,xec-espi-host-dev";
939 reg = <0x400f4400 0x400>;
940 interrupts = <43 3>;
941 girqs = < MCHP_XEC_ECIA(15, 3, 7, 43) >;
946 compatible = "microchip,xec-espi-host-dev";
947 reg = <0x400f4800 0x400>;
948 interrupts = <44 3>;
954 compatible = "microchip,xec-espi-host-dev";
955 reg = <0x400f5000 0x100>;
956 interrupts = <119 3>, <120 3>;
963 /* Capture writes to host I/O 0x80 - 0x83 */
965 compatible = "microchip,xec-espi-host-dev";
966 reg = <0x400f8000 0x400>;
967 interrupts = <62 0>;
973 /* Capture writes to an 8-bit I/O and map to one of 0x80 to 0x83 */
975 compatible = "microchip,xec-espi-host-dev";
976 reg = <0x400f8400 0x400>;
978 host-io = <0x90>;
979 /* map 0x90 to 0x80 */
980 host-io-addr-mask = <0x01>;
986 compatible = "microchip,xec-symcr";
987 reg = <0x40100000 0x1000>;
989 clocks = <&pcr 3 26 MCHP_XEC_PCR_CLK_PERIPH>;
990 girqs = <16 3>;
992 #address-cells = <1>;
993 #size-cells = <1>;
997 reg = <0x1f000 0x1000>;