Lines Matching +full:- +full:15
4 * SPDX-License-Identifier: Apache-2.0
11 compatible = "microchip,xec-pcr";
13 reg-names = "pcrr", "vbatr";
15 core-clock-div = <1>;
17 pll-32k-src = <MCHP_XEC_PLL_CLK32K_SRC_SIL_OSC>;
18 periph-32k-src = <MCHP_XEC_PERIPH_CLK32K_SRC_SO_SO>;
19 clk32kmon-period-min = <1435>;
20 clk32kmon-period-max = <1495>;
21 clk32kmon-duty-cycle-var-max = <132>;
22 clk32kmon-valid-min = <4>;
23 xtal-enable-delay-ms = <300>;
24 pll-lock-timeout-ms = <30>;
25 #clock-cells = <3>;
28 compatible = "microchip,xec-ecia";
30 direct-capable-girqs = <13 14 15 16 17 18 19 20 21 23>;
32 #address-cells = <1>;
33 #size-cells = <1>;
38 compatible = "microchip,xec-ecia-girq";
41 girq-id = <0>;
43 8 9 10 11 12 13 14 15
49 compatible = "microchip,xec-ecia-girq";
52 girq-id = <1>;
54 8 9 10 11 12 13 14 15
60 compatible = "microchip,xec-ecia-girq";
63 girq-id = <2>;
65 8 9 10 11 12 13 14 15
71 compatible = "microchip,xec-ecia-girq";
74 girq-id = <3>;
76 8 9 10 11 12 13 14 15
82 compatible = "microchip,xec-ecia-girq";
85 girq-id = <4>;
87 8 9 10 11 12 13 14 15
93 compatible = "microchip,xec-ecia-girq";
96 girq-id = <5>;
101 compatible = "microchip,xec-ecia-girq";
104 girq-id = <6>;
106 8 9 10 11 12 13 14 15>;
110 compatible = "microchip,xec-ecia-girq";
113 girq-id = <7>;
115 8 9 10 11 12 13 14 15
120 compatible = "microchip,xec-ecia-girq";
123 girq-id = <8>;
128 compatible = "microchip,xec-ecia-girq";
131 girq-id = <9>;
132 sources = <0 1 2 3 4 8 9 10 11 12 13 14 15
137 compatible = "microchip,xec-ecia-girq";
140 girq-id = <10>;
147 compatible = "microchip,xec-ecia-girq";
150 girq-id = <11>;
155 compatible = "microchip,xec-ecia-girq";
158 girq-id = <12>;
163 compatible = "microchip,xec-ecia-girq";
166 girq-id = <13>;
167 sources = <2 3 4 5 6 7 8 9 10 11 12 13 14 15
172 compatible = "microchip,xec-ecia-girq";
175 girq-id = <14>;
176 sources = <0 1 2 3 4 5 9 15>;
180 compatible = "microchip,xec-ecia-girq";
183 girq-id = <15>;
188 compatible = "microchip,xec-ecia-girq";
190 interrupts = <15 0>;
191 girq-id = <16>;
193 12 13 14 15 16 17 18 19
198 compatible = "microchip,xec-ecia-girq";
201 girq-id = <17>;
203 12 13 14 15>;
207 compatible = "microchip,xec-ecia-girq";
210 girq-id = <18>;
215 pinctrl: pin-controller@40081000 {
216 compatible = "microchip,xec-pinctrl";
217 #address-cells = <1>;
218 #size-cells = <1>;
222 compatible = "microchip,xec-gpio-v2";
226 gpio-controller;
227 port-id = <0>;
228 girq-id = <11>;
229 #gpio-cells=<2>;
232 compatible = "microchip,xec-gpio-v2";
236 gpio-controller;
237 port-id = <1>;
238 girq-id = <10>;
239 #gpio-cells=<2>;
242 compatible = "microchip,xec-gpio-v2";
245 gpio-controller;
247 port-id = <2>;
248 girq-id = <9>;
249 #gpio-cells=<2>;
252 compatible = "microchip,xec-gpio-v2";
255 gpio-controller;
257 port-id = <3>;
258 girq-id = <8>;
259 #gpio-cells=<2>;
262 compatible = "microchip,xec-gpio-v2";
265 gpio-controller;
267 port-id = <4>;
268 girq-id = <12>;
269 #gpio-cells=<2>;
272 compatible = "microchip,xec-gpio-v2";
275 gpio-controller;
277 port-id = <5>;
278 girq-id = <26>;
279 #gpio-cells=<2>;
283 compatible = "microchip,xec-watchdog";
290 compatible = "microchip,xec-rtos-timer";
296 compatible = "microchip,xec-timer";
297 clock-frequency = <48000000>;
302 max-value = <0xFFFF>;
307 compatible = "microchip,xec-timer";
308 clock-frequency = <48000000>;
313 max-value = <0xFFFF>;
318 compatible = "microchip,xec-timer";
319 clock-frequency = <48000000>;
324 max-value = <0xFFFF>;
329 compatible = "microchip,xec-timer";
330 clock-frequency = <48000000>;
335 max-value = <0xFFFF>;
345 compatible = "microchip,xec-timer";
346 clock-frequency = <48000000>;
351 max-value = <0xFFFFFFFF>;
356 compatible = "microchip,xec-timer";
357 clock-frequency = <48000000>;
362 max-value = <0xFFFFFFFF>;
421 bbram: bb-ram@4000a800 {
422 compatible = "microchip,xec-bbram";
424 reg-names = "memory";
434 compatible = "microchip,xec-dmac";
455 MCHP_XEC_ECIA(14, 15, 6, 39) >;
457 #dma-cells = <2>;
458 dma-channels = <16>;
459 dma-requests = <16>;
463 compatible = "microchip,xec-i2c-v2";
465 clock-frequency = <I2C_BITRATE_STANDARD>;
469 #address-cells = <1>;
470 #size-cells = <0>;
474 compatible = "microchip,xec-i2c-v2";
476 clock-frequency = <I2C_BITRATE_STANDARD>;
480 #address-cells = <1>;
481 #size-cells = <0>;
485 compatible = "microchip,xec-i2c-v2";
487 clock-frequency = <I2C_BITRATE_STANDARD>;
491 #address-cells = <1>;
492 #size-cells = <0>;
496 compatible = "microchip,xec-i2c-v2";
498 clock-frequency = <I2C_BITRATE_STANDARD>;
501 pcrs = <3 15>;
502 #address-cells = <1>;
503 #size-cells = <0>;
507 compatible = "microchip,xec-i2c-v2";
509 clock-frequency = <I2C_BITRATE_STANDARD>;
513 #address-cells = <1>;
514 #size-cells = <0>;
518 compatible = "microchip,xec-ps2";
523 #address-cells = <1>;
524 #size-cells = <0>;
528 compatible = "microchip,xec-pwm";
532 #pwm-cells = <3>;
535 compatible = "microchip,xec-pwm";
539 #pwm-cells = <3>;
542 compatible = "microchip,xec-pwm";
546 #pwm-cells = <3>;
549 compatible = "microchip,xec-pwm";
553 #pwm-cells = <3>;
556 compatible = "microchip,xec-pwm";
560 #pwm-cells = <3>;
563 compatible = "microchip,xec-pwm";
567 #pwm-cells = <3>;
570 compatible = "microchip,xec-pwm";
574 #pwm-cells = <3>;
577 compatible = "microchip,xec-pwm";
581 #pwm-cells = <3>;
584 compatible = "microchip,xec-pwm";
588 #pwm-cells = <3>;
591 compatible = "microchip,xec-tach";
596 #address-cells = <1>;
597 #size-cells = <0>;
601 compatible = "microchip,xec-tach";
606 #address-cells = <1>;
607 #size-cells = <0>;
611 compatible = "microchip,xec-tach";
616 #address-cells = <1>;
617 #size-cells = <0>;
621 compatible = "microchip,xec-tach";
626 #address-cells = <1>;
627 #size-cells = <0>;
645 compatible = "microchip,xec-adc";
651 #io-channel-cells = <1>;
656 compatible = "microchip,xec-kbd";
662 #address-cells = <1>;
663 #size-cells = <0>;
666 compatible = "microchip,xec-peci";
671 #address-cells = <1>;
672 #size-cells = <0>;
679 clock-frequency = <12000000>;
681 chip-select = <0>;
682 #address-cells = <1>;
683 #size-cells = <0>;
752 girqs = <17 15>;
781 compatible = "microchip,xec-uart";
784 clock-frequency = <1843200>;
785 current-speed = <38400>;
786 girqs = <15 0>;
792 compatible = "microchip,xec-uart";
795 clock-frequency = <1843200>;
796 current-speed = <38400>;
797 girqs = <15 1>;
803 compatible = "microchip,xec-espi-v2";
804 /* reg tuple contains one 32-bit address cell and one
805 * 32-bit length(size) cell.
807 #address-cells = <1>;
808 #size-cells = <1>;
812 reg-names = "io", "mem", "vw";
816 interrupt-names = "pc", "bm1", "bm2", "ltr", "oob_up",
831 compatible = "microchip,xec-espi-saf-v2";
834 reg-names = "safbr", "safqspi", "safcomm";
836 interrupt-names = "done", "err";
844 compatible = "microchip,xec-espi-host-dev";
847 girqs = < MCHP_XEC_ECIA(15, 20, 7, 60) >;
853 compatible = "microchip,xec-espi-host-dev";
856 interrupt-names = "kbc_obe", "kbc_ibf";
857 girqs = < MCHP_XEC_ECIA(15, 18, 7, 58)
858 MCHP_XEC_ECIA(15, 19, 7, 59) >;
863 compatible = "microchip,xec-espi-host-dev";
866 interrupt-names = "acpi_ibf", "acpi_obe";
867 girqs = < MCHP_XEC_ECIA(15, 5, 7, 45)
868 MCHP_XEC_ECIA(15, 6, 7, 46) >;
873 compatible = "microchip,xec-espi-host-dev";
876 interrupt-names = "acpi_ibf", "acpi_obe";
877 girqs = < MCHP_XEC_ECIA(15, 7, 7, 47)
878 MCHP_XEC_ECIA(15, 8, 7, 48) >;
883 compatible = "microchip,xec-espi-host-dev";
886 interrupt-names = "acpi_ibf", "acpi_obe";
887 girqs = < MCHP_XEC_ECIA(15, 9, 7, 49)
888 MCHP_XEC_ECIA(15, 10, 7, 50) >;
893 compatible = "microchip,xec-espi-host-dev";
896 interrupt-names = "acpi_ibf", "acpi_obe";
897 girqs = < MCHP_XEC_ECIA(15, 11, 7, 51)
898 MCHP_XEC_ECIA(15, 12, 7, 52) >;
903 compatible = "microchip,xec-espi-host-dev";
906 interrupt-names = "acpi_ibf", "acpi_obe";
907 girqs = < MCHP_XEC_ECIA(15, 13, 7, 53)
908 MCHP_XEC_ECIA(15, 14, 7, 54) >;
913 compatible = "microchip,xec-espi-host-dev";
916 interrupt-names = "pm1_ctl", "pm1_en", "pm1_sts";
917 girqs = < MCHP_XEC_ECIA(15, 15, 7, 55)
918 MCHP_XEC_ECIA(15, 16, 7, 56)
919 MCHP_XEC_ECIA(15, 17, 7, 57) >;
924 compatible = "microchip,xec-espi-host-dev";
930 compatible = "microchip,xec-espi-host-dev";
933 girqs = < MCHP_XEC_ECIA(15, 2, 7, 42) >;
938 compatible = "microchip,xec-espi-host-dev";
941 girqs = < MCHP_XEC_ECIA(15, 3, 7, 43) >;
946 compatible = "microchip,xec-espi-host-dev";
949 girqs = < MCHP_XEC_ECIA(15, 4, 7, 44) >;
954 compatible = "microchip,xec-espi-host-dev";
963 /* Capture writes to host I/O 0x80 - 0x83 */
965 compatible = "microchip,xec-espi-host-dev";
968 girqs = < MCHP_XEC_ECIA(15, 22, 7, 62) >;
973 /* Capture writes to an 8-bit I/O and map to one of 0x80 to 0x83 */
975 compatible = "microchip,xec-espi-host-dev";
978 host-io = <0x90>;
980 host-io-addr-mask = <0x01>;
986 compatible = "microchip,xec-symcr";
992 #address-cells = <1>;
993 #size-cells = <1>;