Lines Matching +full:sda +full:- +full:src
3 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/pinctrl/xmc4xxx-pinctrl.h>
10 /omit-if-no-ref/ uart_tx_p0_1_u1c1: uart_tx_p0_1_u1c1 {
13 /omit-if-no-ref/ uart_tx_p0_5_u1c0: uart_tx_p0_5_u1c0 {
16 /omit-if-no-ref/ uart_tx_p1_5_u0c0: uart_tx_p1_5_u0c0 {
19 /omit-if-no-ref/ uart_tx_p1_7_u0c0: uart_tx_p1_7_u0c0 {
22 /omit-if-no-ref/ uart_tx_p2_5_u0c1: uart_tx_p2_5_u0c1 {
25 /omit-if-no-ref/ uart_tx_p2_14_u1c0: uart_tx_p2_14_u1c0 {
28 /omit-if-no-ref/ uart_tx_p3_5_u2c1: uart_tx_p3_5_u2c1 {
31 /omit-if-no-ref/ uart_tx_p3_5_u0c1: uart_tx_p3_5_u0c1 {
34 /omit-if-no-ref/ uart_tx_p5_0_u2c0: uart_tx_p5_0_u2c0 {
37 /omit-if-no-ref/ uart_tx_p5_1_u0c0: uart_tx_p5_1_u0c0 {
41 /omit-if-no-ref/ uart_rx_p1_4_u0c0: uart_rx_p1_4_u0c0 {
42 pinmux = <XMC4XXX_PINMUX_SET(1, 4, 0)>; /* USIC input src = DX0B */
44 /omit-if-no-ref/ uart_rx_p1_5_u0c0: uart_rx_p1_5_u0c0 {
45 pinmux = <XMC4XXX_PINMUX_SET(1, 5, 0)>; /* USIC input src = DX0A */
47 /omit-if-no-ref/ uart_rx_p5_0_u0c0: uart_rx_p5_0_u0c0 {
48 pinmux = <XMC4XXX_PINMUX_SET(5, 0, 0)>; /* USIC input src = DX0D */
50 /omit-if-no-ref/ uart_rx_p2_2_u0c1: uart_rx_p2_2_u0c1 {
51 pinmux = <XMC4XXX_PINMUX_SET(2, 2, 0)>; /* USIC input src = DX0A */
53 /omit-if-no-ref/ uart_rx_p2_5_u0c1: uart_rx_p2_5_u0c1 {
54 pinmux = <XMC4XXX_PINMUX_SET(2, 5, 0)>; /* USIC input src = DX0B */
56 /omit-if-no-ref/ uart_rx_p4_0_u0c1: uart_rx_p4_0_u0c1 {
57 pinmux = <XMC4XXX_PINMUX_SET(4, 0, 0)>; /* USIC input src = DX0E */
59 /omit-if-no-ref/ uart_rx_p0_4_u1c0: uart_rx_p0_4_u1c0 {
60 pinmux = <XMC4XXX_PINMUX_SET(0, 4, 0)>; /* USIC input src = DX0A */
62 /omit-if-no-ref/ uart_rx_p0_5_u1c0: uart_rx_p0_5_u1c0 {
63 pinmux = <XMC4XXX_PINMUX_SET(0, 5, 0)>; /* USIC input src = DX0B */
65 /omit-if-no-ref/ uart_rx_p2_14_u1c0: uart_rx_p2_14_u1c0 {
66 pinmux = <XMC4XXX_PINMUX_SET(2, 14, 0)>; /* USIC input src = DX0D */
68 /omit-if-no-ref/ uart_rx_p2_15_u1c0: uart_rx_p2_15_u1c0 {
69 pinmux = <XMC4XXX_PINMUX_SET(2, 15, 0)>; /* USIC input src = DX0C */
71 /omit-if-no-ref/ uart_rx_p0_0_u1c1: uart_rx_p0_0_u1c1 {
72 pinmux = <XMC4XXX_PINMUX_SET(0, 0, 0)>; /* USIC input src = DX0D */
74 /omit-if-no-ref/ uart_rx_p5_0_u2c0: uart_rx_p5_0_u2c0 {
75 pinmux = <XMC4XXX_PINMUX_SET(5, 0, 0)>; /* USIC input src = DX0B */
77 /omit-if-no-ref/ uart_rx_p5_1_u2c0: uart_rx_p5_1_u2c0 {
78 pinmux = <XMC4XXX_PINMUX_SET(5, 1, 0)>; /* USIC input src = DX0A */
80 /omit-if-no-ref/ uart_rx_p3_4_u2c1: uart_rx_p3_4_u2c1 {
81 pinmux = <XMC4XXX_PINMUX_SET(3, 4, 0)>; /* USIC input src = DX0B */
83 /omit-if-no-ref/ uart_rx_p3_5_u2c1: uart_rx_p3_5_u2c1 {
84 pinmux = <XMC4XXX_PINMUX_SET(3, 5, 0)>; /* USIC input src = DX0A */
86 /omit-if-no-ref/ uart_rx_p4_0_u2c1: uart_rx_p4_0_u2c1 {
87 pinmux = <XMC4XXX_PINMUX_SET(4, 0, 0)>; /* USIC input src = DX0C */
90 /omit-if-no-ref/ spi_mosi_p0_1_u1c1: spi_mosi_p0_1_u1c1 {
93 /omit-if-no-ref/ spi_mosi_p0_5_u1c0: spi_mosi_p0_5_u1c0 {
96 /omit-if-no-ref/ spi_mosi_p1_5_u0c0: spi_mosi_p1_5_u0c0 {
99 /omit-if-no-ref/ spi_mosi_p1_7_u0c0: spi_mosi_p1_7_u0c0 {
102 /omit-if-no-ref/ spi_mosi_p2_5_u0c1: spi_mosi_p2_5_u0c1 {
105 /omit-if-no-ref/ spi_mosi_p2_14_u1c0: spi_mosi_p2_14_u1c0 {
108 /omit-if-no-ref/ spi_mosi_p3_5_u2c1: spi_mosi_p3_5_u2c1 {
111 /omit-if-no-ref/ spi_mosi_p3_5_u0c1: spi_mosi_p3_5_u0c1 {
114 /omit-if-no-ref/ spi_mosi_p5_0_u2c0: spi_mosi_p5_0_u2c0 {
117 /omit-if-no-ref/ spi_mosi_p5_1_u0c0: spi_mosi_p5_1_u0c0 {
121 /omit-if-no-ref/ spi_miso_p1_4_u0c0: spi_miso_p1_4_u0c0 {
122 pinmux = <XMC4XXX_PINMUX_SET(1, 4, 0)>; /* USIC input src = DX0B */
124 /omit-if-no-ref/ spi_miso_p1_5_u0c0: spi_miso_p1_5_u0c0 {
125 pinmux = <XMC4XXX_PINMUX_SET(1, 5, 0)>; /* USIC input src = DX0A */
127 /omit-if-no-ref/ spi_miso_p5_0_u0c0: spi_miso_p5_0_u0c0 {
128 pinmux = <XMC4XXX_PINMUX_SET(5, 0, 0)>; /* USIC input src = DX0D */
130 /omit-if-no-ref/ spi_miso_p2_2_u0c1: spi_miso_p2_2_u0c1 {
131 pinmux = <XMC4XXX_PINMUX_SET(2, 2, 0)>; /* USIC input src = DX0A */
133 /omit-if-no-ref/ spi_miso_p2_5_u0c1: spi_miso_p2_5_u0c1 {
134 pinmux = <XMC4XXX_PINMUX_SET(2, 5, 0)>; /* USIC input src = DX0B */
136 /omit-if-no-ref/ spi_miso_p4_0_u0c1: spi_miso_p4_0_u0c1 {
137 pinmux = <XMC4XXX_PINMUX_SET(4, 0, 0)>; /* USIC input src = DX0E */
139 /omit-if-no-ref/ spi_miso_p0_4_u1c0: spi_miso_p0_4_u1c0 {
140 pinmux = <XMC4XXX_PINMUX_SET(0, 4, 0)>; /* USIC input src = DX0A */
142 /omit-if-no-ref/ spi_miso_p0_5_u1c0: spi_miso_p0_5_u1c0 {
143 pinmux = <XMC4XXX_PINMUX_SET(0, 5, 0)>; /* USIC input src = DX0B */
145 /omit-if-no-ref/ spi_miso_p2_14_u1c0: spi_miso_p2_14_u1c0 {
146 pinmux = <XMC4XXX_PINMUX_SET(2, 14, 0)>; /* USIC input src = DX0D */
148 /omit-if-no-ref/ spi_miso_p2_15_u1c0: spi_miso_p2_15_u1c0 {
149 pinmux = <XMC4XXX_PINMUX_SET(2, 15, 0)>; /* USIC input src = DX0C */
151 /omit-if-no-ref/ spi_miso_p0_0_u1c1: spi_miso_p0_0_u1c1 {
152 pinmux = <XMC4XXX_PINMUX_SET(0, 0, 0)>; /* USIC input src = DX0D */
154 /omit-if-no-ref/ spi_miso_p5_0_u2c0: spi_miso_p5_0_u2c0 {
155 pinmux = <XMC4XXX_PINMUX_SET(5, 0, 0)>; /* USIC input src = DX0B */
157 /omit-if-no-ref/ spi_miso_p5_1_u2c0: spi_miso_p5_1_u2c0 {
158 pinmux = <XMC4XXX_PINMUX_SET(5, 1, 0)>; /* USIC input src = DX0A */
160 /omit-if-no-ref/ spi_miso_p3_4_u2c1: spi_miso_p3_4_u2c1 {
161 pinmux = <XMC4XXX_PINMUX_SET(3, 4, 0)>; /* USIC input src = DX0B */
163 /omit-if-no-ref/ spi_miso_p3_5_u2c1: spi_miso_p3_5_u2c1 {
164 pinmux = <XMC4XXX_PINMUX_SET(3, 5, 0)>; /* USIC input src = DX0A */
166 /omit-if-no-ref/ spi_miso_p4_0_u2c1: spi_miso_p4_0_u2c1 {
167 pinmux = <XMC4XXX_PINMUX_SET(4, 0, 0)>; /* USIC input src = DX0C */
169 /omit-if-no-ref/ spi_sclk_p0_8_u0c0: spi_sclk_p0_8_u0c0 {
172 /omit-if-no-ref/ spi_sclk_p0_10_u1c1: spi_sclk_p0_10_u1c1 {
175 /omit-if-no-ref/ spi_sclk_p0_11_u1c0: spi_sclk_p0_11_u1c0 {
178 /omit-if-no-ref/ spi_sclk_p1_1_u0c0: spi_sclk_p1_1_u0c0 {
181 /omit-if-no-ref/ spi_sclk_p1_6_u0c0: spi_sclk_p1_6_u0c0 {
184 /omit-if-no-ref/ spi_sclk_p1_10_u0c0: spi_sclk_p1_10_u0c0 {
187 /omit-if-no-ref/ spi_sclk_p2_4_u0c1: spi_sclk_p2_4_u0c1 {
190 /omit-if-no-ref/ spi_sclk_p3_0_u0c1: spi_sclk_p3_0_u0c1 {
193 /omit-if-no-ref/ spi_sclk_p3_6_u2c1: spi_sclk_p3_6_u2c1 {
196 /omit-if-no-ref/ spi_sclk_p3_6_u0c1: spi_sclk_p3_6_u0c1 {
199 /omit-if-no-ref/ spi_sclk_p5_2_u2c0: spi_sclk_p5_2_u2c0 {
203 /omit-if-no-ref/ pwm_out_p0_12_ccu40_ch3: pwm_out_p0_12_ccu40_ch3 {
206 /omit-if-no-ref/ pwm_out_p1_0_ccu40_ch3: pwm_out_p1_0_ccu40_ch3 {
209 /omit-if-no-ref/ pwm_out_p1_1_ccu40_ch2: pwm_out_p1_1_ccu40_ch2 {
212 /omit-if-no-ref/ pwm_out_p1_2_ccu40_ch1: pwm_out_p1_2_ccu40_ch1 {
215 /omit-if-no-ref/ pwm_out_p1_3_ccu40_ch0: pwm_out_p1_3_ccu40_ch0 {
218 /omit-if-no-ref/ pwm_out_p2_2_ccu41_ch3: pwm_out_p2_2_ccu41_ch3 {
221 /omit-if-no-ref/ pwm_out_p2_3_ccu41_ch2: pwm_out_p2_3_ccu41_ch2 {
224 /omit-if-no-ref/ pwm_out_p2_4_ccu41_ch1: pwm_out_p2_4_ccu41_ch1 {
227 /omit-if-no-ref/ pwm_out_p2_5_ccu41_ch0: pwm_out_p2_5_ccu41_ch0 {
230 /omit-if-no-ref/ pwm_out_p3_0_ccu42_ch0: pwm_out_p3_0_ccu42_ch0 {
233 /omit-if-no-ref/ pwm_out_p3_3_ccu42_ch3: pwm_out_p3_3_ccu42_ch3 {
236 /omit-if-no-ref/ pwm_out_p3_4_ccu42_ch2: pwm_out_p3_4_ccu42_ch2 {
239 /omit-if-no-ref/ pwm_out_p3_5_ccu42_ch1: pwm_out_p3_5_ccu42_ch1 {
242 /omit-if-no-ref/ pwm_out_p3_6_ccu42_ch0: pwm_out_p3_6_ccu42_ch0 {
246 /omit-if-no-ref/ pwm_out_p0_0_ccu80_ch2_low: pwm_out_p0_0_ccu80_ch2_low {
249 /omit-if-no-ref/ pwm_out_p0_1_ccu80_ch1_low: pwm_out_p0_1_ccu80_ch1_low {
252 /omit-if-no-ref/ pwm_out_p0_2_ccu80_ch0_low: pwm_out_p0_2_ccu80_ch0_low {
255 /omit-if-no-ref/ pwm_out_p0_3_ccu80_ch2_high: pwm_out_p0_3_ccu80_ch2_high {
258 /omit-if-no-ref/ pwm_out_p0_4_ccu80_ch1_high: pwm_out_p0_4_ccu80_ch1_high {
261 /omit-if-no-ref/ pwm_out_p0_5_ccu80_ch0_high: pwm_out_p0_5_ccu80_ch0_high {
264 /omit-if-no-ref/ pwm_out_p0_6_ccu80_ch3_high: pwm_out_p0_6_ccu80_ch3_high {
267 /omit-if-no-ref/ pwm_out_p0_9_ccu80_ch1_high: pwm_out_p0_9_ccu80_ch1_high {
270 /omit-if-no-ref/ pwm_out_p0_10_ccu80_ch0_high: pwm_out_p0_10_ccu80_ch0_high {
273 /omit-if-no-ref/ pwm_out_p0_11_ccu80_ch3_low: pwm_out_p0_11_ccu80_ch3_low {
276 /omit-if-no-ref/ pwm_out_p1_4_ccu80_ch3_low: pwm_out_p1_4_ccu80_ch3_low {
279 /omit-if-no-ref/ pwm_out_p1_4_ccu81_ch2_high: pwm_out_p1_4_ccu81_ch2_high {
282 /omit-if-no-ref/ pwm_out_p1_5_ccu80_ch2_low: pwm_out_p1_5_ccu80_ch2_low {
285 /omit-if-no-ref/ pwm_out_p1_5_ccu81_ch1_high: pwm_out_p1_5_ccu81_ch1_high {
288 /omit-if-no-ref/ pwm_out_p1_10_ccu81_ch2_low: pwm_out_p1_10_ccu81_ch2_low {
291 /omit-if-no-ref/ pwm_out_p1_11_ccu81_ch1_low: pwm_out_p1_11_ccu81_ch1_low {
294 /omit-if-no-ref/ pwm_out_p1_12_ccu81_ch0_low: pwm_out_p1_12_ccu81_ch0_low {
297 /omit-if-no-ref/ pwm_out_p1_13_ccu81_ch2_high: pwm_out_p1_13_ccu81_ch2_high {
300 /omit-if-no-ref/ pwm_out_p1_14_ccu81_ch1_high: pwm_out_p1_14_ccu81_ch1_high {
303 /omit-if-no-ref/ pwm_out_p1_15_ccu81_ch0_high: pwm_out_p1_15_ccu81_ch0_high {
306 /omit-if-no-ref/ pwm_out_p2_0_ccu81_ch2_low: pwm_out_p2_0_ccu81_ch2_low {
309 /omit-if-no-ref/ pwm_out_p2_1_ccu81_ch1_low: pwm_out_p2_1_ccu81_ch1_low {
312 /omit-if-no-ref/ pwm_out_p2_2_ccu81_ch0_low: pwm_out_p2_2_ccu81_ch0_low {
315 /omit-if-no-ref/ pwm_out_p2_6_ccu80_ch1_low: pwm_out_p2_6_ccu80_ch1_low {
318 /omit-if-no-ref/ pwm_out_p2_7_ccu80_ch0_low: pwm_out_p2_7_ccu80_ch0_low {
321 /omit-if-no-ref/ pwm_out_p2_8_ccu80_ch3_high: pwm_out_p2_8_ccu80_ch3_high {
324 /omit-if-no-ref/ pwm_out_p2_9_ccu80_ch2_high: pwm_out_p2_9_ccu80_ch2_high {
327 /omit-if-no-ref/ pwm_out_p2_14_ccu80_ch2_low: pwm_out_p2_14_ccu80_ch2_low {
330 /omit-if-no-ref/ pwm_out_p2_15_ccu80_ch1_low: pwm_out_p2_15_ccu80_ch1_low {
333 /omit-if-no-ref/ pwm_out_p5_0_ccu81_ch3_low: pwm_out_p5_0_ccu81_ch3_low {
336 /omit-if-no-ref/ pwm_out_p5_1_ccu81_ch3_high: pwm_out_p5_1_ccu81_ch3_high {
339 /omit-if-no-ref/ pwm_out_p5_2_ccu81_ch2_low: pwm_out_p5_2_ccu81_ch2_low {
342 /omit-if-no-ref/ pwm_out_p5_7_ccu81_ch0_high: pwm_out_p5_7_ccu81_ch0_high {
345 /omit-if-no-ref/ i2c_sda_p0_5_u1c0: i2c_sda_p0_5_u1c0 {
346 pinmux = <XMC4XXX_PINMUX_SET(0, 5, 2)>; /* USIC sda-src = DX0B */
348 /omit-if-no-ref/ i2c_sda_p3_5_u0c1: i2c_sda_p3_5_u0c1 {
349 pinmux = <XMC4XXX_PINMUX_SET(3, 5, 4)>; /* USIC sda-src = DX0A */
351 /omit-if-no-ref/ i2c_sda_p5_1_u0c0: i2c_sda_p5_1_u0c0 {
352 pinmux = <XMC4XXX_PINMUX_SET(5, 1, 1)>; /* USIC sda-src = DX0A */
354 /omit-if-no-ref/ i2c_sda_p1_5_u0c0: i2c_sda_p1_5_u0c0 {
355 pinmux = <XMC4XXX_PINMUX_SET(1, 5, 2)>; /* USIC sda-src = DX0A */
357 /omit-if-no-ref/ i2c_sda_p2_14_u1c0: i2c_sda_p2_14_u1c0 {
358 pinmux = <XMC4XXX_PINMUX_SET(2, 14, 2)>; /* USIC sda-src = DX0D */
360 /omit-if-no-ref/ i2c_sda_p2_5_u0c1: i2c_sda_p2_5_u0c1 {
361 pinmux = <XMC4XXX_PINMUX_SET(2, 5, 2)>; /* USIC sda-src = DX0B */
363 /omit-if-no-ref/ i2c_sda_p5_0_u2c0: i2c_sda_p5_0_u2c0 {
364 pinmux = <XMC4XXX_PINMUX_SET(5, 0, 1)>; /* USIC sda-src = DX0B */
367 /omit-if-no-ref/ i2c_scl_p2_4_u0c1: i2c_scl_p2_4_u0c1 {
368 pinmux = <XMC4XXX_PINMUX_SET(2, 4, 2)>; /* USIC scl-src = DX1A */
370 /omit-if-no-ref/ i2c_scl_p0_11_u1c0: i2c_scl_p0_11_u1c0 {
371 pinmux = <XMC4XXX_PINMUX_SET(0, 11, 2)>; /* USIC scl-src = DX1A */
373 /omit-if-no-ref/ i2c_scl_p5_2_u2c0: i2c_scl_p5_2_u2c0 {
374 pinmux = <XMC4XXX_PINMUX_SET(5, 2, 1)>; /* USIC scl-src = DX1A */
376 /omit-if-no-ref/ i2c_scl_p3_6_u0c1: i2c_scl_p3_6_u0c1 {
377 pinmux = <XMC4XXX_PINMUX_SET(3, 6, 4)>; /* USIC scl-src = DX1B */
379 /omit-if-no-ref/ i2c_scl_p1_1_u0c0: i2c_scl_p1_1_u0c0 {
380 pinmux = <XMC4XXX_PINMUX_SET(1, 1, 2)>; /* USIC scl-src = DX1A */
382 /omit-if-no-ref/ i2c_scl_p3_0_u0c1: i2c_scl_p3_0_u0c1 {
383 pinmux = <XMC4XXX_PINMUX_SET(3, 0, 2)>; /* USIC scl-src = DX1B */
385 /omit-if-no-ref/ i2c_scl_p0_10_u1c1: i2c_scl_p0_10_u1c1 {
386 pinmux = <XMC4XXX_PINMUX_SET(0, 10, 2)>; /* USIC scl-src = DX1A */
388 /omit-if-no-ref/ i2c_scl_p0_8_u0c0: i2c_scl_p0_8_u0c0 {
389 pinmux = <XMC4XXX_PINMUX_SET(0, 8, 2)>; /* USIC scl-src = DX1B */
392 /omit-if-no-ref/ i2c_sda_dx0_p0_4_u1c0: i2c_sda_dx0_p0_4_u1c0 {
393 pinmux = <XMC4XXX_PINMUX_SET(0, 4, 0)>; /* USIC sda-src = DX0A */
395 /omit-if-no-ref/ i2c_sda_dx0_p3_4_u2c1: i2c_sda_dx0_p3_4_u2c1 {
396 pinmux = <XMC4XXX_PINMUX_SET(3, 4, 0)>; /* USIC sda-src = DX0B */
398 /omit-if-no-ref/ i2c_sda_dx0_p0_0_u1c1: i2c_sda_dx0_p0_0_u1c1 {
399 pinmux = <XMC4XXX_PINMUX_SET(0, 0, 0)>; /* USIC sda-src = DX0D */
401 /omit-if-no-ref/ i2c_sda_dx0_p4_0_u2c1: i2c_sda_dx0_p4_0_u2c1 {
402 pinmux = <XMC4XXX_PINMUX_SET(4, 0, 0)>; /* USIC sda-src = DX0C */
404 /omit-if-no-ref/ i2c_sda_dx0_p2_15_u1c0: i2c_sda_dx0_p2_15_u1c0 {
405 pinmux = <XMC4XXX_PINMUX_SET(2, 15, 0)>; /* USIC sda-src = DX0C */
407 /omit-if-no-ref/ i2c_sda_dx0_p1_4_u0c0: i2c_sda_dx0_p1_4_u0c0 {
408 pinmux = <XMC4XXX_PINMUX_SET(1, 4, 0)>; /* USIC sda-src = DX0B */
410 /omit-if-no-ref/ i2c_sda_dx0_p2_2_u0c1: i2c_sda_dx0_p2_2_u0c1 {
411 pinmux = <XMC4XXX_PINMUX_SET(2, 2, 0)>; /* USIC sda-src = DX0A */
413 /omit-if-no-ref/ i2c_sda_dout0_p0_1_u1c1: i2c_sda_dout0_p0_1_u1c1 {
416 /omit-if-no-ref/ i2c_sda_dout0_p1_7_u0c0: i2c_sda_dout0_p1_7_u0c0 {
419 /omit-if-no-ref/ i2c_scl_dx1_p4_0_u1c1: i2c_scl_dx1_p4_0_u1c1 {
420 pinmux = <XMC4XXX_PINMUX_SET(4, 0, 0)>; /* USIC scl-src = DX1C */
422 /omit-if-no-ref/ i2c_scl_dout1_p1_6_u0c0: i2c_scl_dout1_p1_6_u0c0 {
425 /omit-if-no-ref/ i2c_scl_dout1_p1_10_u0c0: i2c_scl_dout1_p1_10_u0c0 {
429 /omit-if-no-ref/ eth_p0_9_mdo: ebu_p0_9_mdo {
433 /omit-if-no-ref/ eth_p1_11_mdo: ebu_p1_11_mdo {
437 /omit-if-no-ref/ eth_p2_0_mdo: ebu_p2_0_mdo {
442 /omit-if-no-ref/ eth_p0_9_mdio: eth_p0_9_mdio {
445 /omit-if-no-ref/ eth_p2_0_mdio: eth_p2_0_mdio {
448 /omit-if-no-ref/ eth_p1_11_mdio: eth_p1_11_mdio {
452 /omit-if-no-ref/ eth_p0_4_tx_en: eth_p0_4_tx_en {
455 /omit-if-no-ref/ eth_p0_5_txd0: eth_p0_5_txd0 {
458 /omit-if-no-ref/ eth_p0_6_txd1: eth_p0_6_txd1 {
461 /omit-if-no-ref/ eth_p0_10_mdc: eth_p0_10_mdc {
464 /omit-if-no-ref/ eth_p1_10_mdc: eth_p1_10_mdc {
467 /omit-if-no-ref/ eth_p1_12_tx_en: eth_p1_12_tx_en {
470 /omit-if-no-ref/ eth_p1_13_txd0: eth_p1_13_txd0 {
473 /omit-if-no-ref/ eth_p1_14_txd1: eth_p1_14_txd1 {
476 /omit-if-no-ref/ eth_p2_5_tx_en: eth_p2_5_tx_en {
479 /omit-if-no-ref/ eth_p2_7_mdc: eth_p2_7_mdc {
482 /omit-if-no-ref/ eth_p2_8_txd0: eth_p2_8_txd0 {
485 /omit-if-no-ref/ eth_p2_9_txd1: eth_p2_9_txd1 {
489 /omit-if-no-ref/ eth_p2_2_rxd0: eth_p2_2_rxd0 {
492 /omit-if-no-ref/ eth_p0_2_rxd0: eth_p0_2_rxd0 {
495 /omit-if-no-ref/ eth_p14_8_rxd0: eth_p14_8_rxd0 {
498 /omit-if-no-ref/ eth_p5_0_rxd0: eth_p5_0_rxd0 {
501 /omit-if-no-ref/ eth_p2_3_rxd1: eth_p2_3_rxd1 {
504 /omit-if-no-ref/ eth_p0_3_rxd1: eth_p0_3_rxd1 {
507 /omit-if-no-ref/ eth_p14_9_rxd1: eth_p14_9_rxd1 {
510 /omit-if-no-ref/ eth_p5_1_rxd1: eth_p5_1_rxd1 {
513 /omit-if-no-ref/ eth_p5_8_rxd2: eth_p5_8_rxd2 {
516 /omit-if-no-ref/ eth_p6_4_rxd2: eth_p6_4_rxd2 {
519 /omit-if-no-ref/ eth_p5_9_rxd3: eth_p5_9_rxd3 {
522 /omit-if-no-ref/ eth_p6_3_rxd3: eth_p6_3_rxd3 {
525 /omit-if-no-ref/ eth_p2_1_clk_rmii: eth_p2_1_clk_rmii {
528 /omit-if-no-ref/ eth_p0_0_clk_rmii: eth_p0_0_clk_rmii {
531 /omit-if-no-ref/ eth_p15_8_clk_rmii: eth_p15_8_clk_rmii {
534 /omit-if-no-ref/ eth_p6_5_clk_rmii: eth_p6_5_clk_rmii {
537 /omit-if-no-ref/ eth_p2_5_crs_dv: eth_p2_5_crs_dv {
540 /omit-if-no-ref/ eth_p0_1_crs_dv: eth_p0_1_crs_dv {
543 /omit-if-no-ref/ eth_p15_9_crs_dv: eth_p15_9_crs_dv {
546 /omit-if-no-ref/ eth_p5_2_crs_dv: eth_p5_2_crs_dv {
549 /omit-if-no-ref/ eth_p5_11_crs: eth_p5_11_crs {
552 /omit-if-no-ref/ eth_p5_4_crs: eth_p5_4_crs {
555 /omit-if-no-ref/ eth_p2_4_rxer: eth_p2_4_rxer {
558 /omit-if-no-ref/ eth_p0_11_rxer: eth_p0_11_rxer {
561 /omit-if-no-ref/ eth_p5_3_rxer: eth_p5_3_rxer {
564 /omit-if-no-ref/ eth_p2_15_col: eth_p2_15_col {
567 /omit-if-no-ref/ eth_p5_5_col: eth_p5_5_col {
570 /omit-if-no-ref/ eth_p5_10_clk_tx: eth_p5_10_clk_tx {
573 /omit-if-no-ref/ eth_p6_6_clk_tx: eth_p6_6_clk_tx {
577 /omit-if-no-ref/ can_tx_p0_0_node0: can_tx_p0_0_node0 {
580 /omit-if-no-ref/ can_tx_p1_4_node0: can_tx_p1_4_node0 {
583 /omit-if-no-ref/ can_tx_p1_5_node1: can_tx_p1_5_node1 {
586 /omit-if-no-ref/ can_tx_p1_9_node2: can_tx_p1_9_node2 {
589 /omit-if-no-ref/ can_tx_p1_12_node1: can_tx_p1_12_node1 {
592 /omit-if-no-ref/ can_tx_p2_7_node1: can_tx_p2_7_node1 {
595 /omit-if-no-ref/ can_tx_p3_2_node0: can_tx_p3_2_node0 {
599 /omit-if-no-ref/ can_rx_p1_5_node0: can_rx_p1_5_node0 {
600 pinmux = <XMC4XXX_PINMUX_SET(1, 5, 0)>; /* CAN input src = RXDA */
602 /omit-if-no-ref/ can_rx_p14_3_node0: can_rx_p14_3_node0 {
603 pinmux = <XMC4XXX_PINMUX_SET(14, 3, 0)>; /* CAN input src = RXDB */
605 /omit-if-no-ref/ can_rx_p2_6_node1: can_rx_p2_6_node1 {
606 pinmux = <XMC4XXX_PINMUX_SET(2, 6, 0)>; /* CAN input src = RXDA */
608 /omit-if-no-ref/ can_rx_p1_13_node1: can_rx_p1_13_node1 {
609 pinmux = <XMC4XXX_PINMUX_SET(1, 13, 0)>; /* CAN input src = RXDC */
611 /omit-if-no-ref/ can_rx_p1_4_node1: can_rx_p1_4_node1 {
612 pinmux = <XMC4XXX_PINMUX_SET(1, 4, 0)>; /* CAN input src = RXDD */
614 /omit-if-no-ref/ can_rx_p1_8_node2: can_rx_p1_8_node2 {
615 pinmux = <XMC4XXX_PINMUX_SET(1, 8, 0)>; /* CAN input src = RXDA */