Lines Matching +full:0 +full:x40024000
26 #size-cells = <0>;
28 cpu0: cpu@0 {
31 reg = <0>;
37 reg = <0xe000ed90 0x40>;
45 reg = <0x400e0400 0x200>;
46 interrupts = <5 0>;
53 reg = <0x400e1410 0x20>;
64 reg = <0x400e0a00 0x200>;
65 interrupts = <6 0>;
81 reg = <0x400e1450 0xc>;
82 interrupts = <4 0>;
90 reg = <0x40018000 0x128>;
91 interrupts = <19 0>;
95 #size-cells = <0>;
101 reg = <0x4001c000 0x128>;
102 interrupts = <20 0>;
106 #size-cells = <0>;
112 #size-cells = <0>;
113 reg = <0x40008000 0x4000>;
114 interrupts = <21 0>;
121 reg = <0x400e0600 0x200>;
129 reg = <0x400e0800 0x200>;
137 reg = <0x40020000 0x4000>;
148 reg = <0x40024000 0x130>;
156 reg = <0x40028000 0x130>;
166 ranges = <0x400e0e00 0x400e0e00 0x600>;
171 reg = <0x400e0e00 0x190>;
181 reg = <0x400e1000 0x190>;
191 reg = <0x400e1200 0x190>;
202 reg = <0x40010000 0x100>;
203 interrupts = <23 0
204 24 0
205 25 0>;
214 reg = <0x40014000 0x100>;
215 interrupts = <26 0
216 27 0
217 28 0>;
226 reg = <0x40038000 0x4000>;
230 #size-cells = <0>;
237 reg = <0x400e1400 0x10>;
245 #size-cells = <0>;
246 reg = <0x400e0000 0x200>;
253 reg = <0x400e1460 0x100>;
254 interrupts = <2 0>;