Lines Matching +full:address +full:- +full:1
1 /* SPDX-License-Identifier: Apache-2.0 */
3 #include <arm/armv7-m.dtsi>
6 #include <zephyr/dt-bindings/i2c/i2c.h>
7 #include <zephyr/dt-bindings/gpio/gpio.h>
11 uartclk: apb-pclk {
12 compatible = "fixed-clock";
13 clock-frequency = <DT_FREQ_M(24)>;
14 #clock-cells = <0>;
18 clock-frequency = <DT_FREQ_M(32)>;
19 #clock-cells = <1>;
23 clock-frequency = <DT_FREQ_K(32)>;
24 #clock-cells = <1>;
29 #address-cells = <1>;
30 #size-cells = <0>;
33 compatible = "arm,cortex-m4f";
35 #address-cells = <1>;
36 #size-cells = <1>;
39 compatible = "arm,armv7m-itm";
41 swo-ref-frequency = <DT_FREQ_M(48)>;
48 compatible = "zephyr,memory-region";
50 zephyr,memory-region = "ITCM";
55 compatible = "mmio-sram";
60 compatible = "ambiq,apollo4p-blue", "ambiq,apollo4x", "simple-bus";
62 flash: flash-controller@18000 {
63 compatible = "ambiq,flash-controller";
66 #address-cells = <1>;
67 #size-cells = <1>;
71 compatible = "soc-nv-flash";
79 #pwrcfg-cells = <2>;
93 clock-frequency = <DT_FREQ_M(6)>;
94 clk-source = <1>;
102 interrupt-names = "UART0";
111 interrupt-names = "UART1";
121 interrupt-names = "UART2";
131 interrupt-names = "UART3";
139 #address-cells = <1>;
140 #size-cells = <0>;
148 #address-cells = <1>;
149 #size-cells = <0>;
157 #address-cells = <1>;
158 #size-cells = <0>;
166 #address-cells = <1>;
167 #size-cells = <0>;
177 #address-cells = <1>;
178 #size-cells = <0>;
180 cs-gpios = <&gpio32_63 22 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
181 clock-frequency = <DT_FREQ_M(24)>;
185 bt_hci_apollo: bt-hci@0 {
186 compatible = "ambiq,bt-hci-spi";
188 spi-max-frequency = <DT_FREQ_M(24)>;
189 irq-gpios = <&gpio32_63 21 GPIO_ACTIVE_HIGH>;
190 reset-gpios = <&gpio32_63 23 GPIO_ACTIVE_LOW>;
191 clkreq-gpios = <&gpio32_63 20 GPIO_ACTIVE_HIGH>;
197 #address-cells = <1>;
198 #size-cells = <0>;
206 #address-cells = <1>;
207 #size-cells = <0>;
215 #address-cells = <1>;
216 #size-cells = <0>;
224 #address-cells = <1>;
225 #size-cells = <0>;
233 #address-cells = <1>;
234 #size-cells = <0>;
242 #address-cells = <1>;
243 #size-cells = <0>;
251 #address-cells = <1>;
252 #size-cells = <0>;
260 #address-cells = <1>;
261 #size-cells = <0>;
269 #address-cells = <1>;
270 #size-cells = <0>;
278 #address-cells = <1>;
279 #size-cells = <0>;
287 #address-cells = <1>;
288 #size-cells = <0>;
298 #address-cells = <1>;
299 #size-cells = <0>;
308 #address-cells = <1>;
309 #size-cells = <0>;
318 #address-cells = <1>;
319 #size-cells = <0>;
328 num-bidir-endpoints = <6>;
329 maximum-speed = "full-speed";
338 alarms-count = <1>;
342 pinctrl: pin-controller@40010000 {
343 compatible = "ambiq,apollo4-pinctrl";
345 #address-cells = <1>;
346 #size-cells = <0>;
350 gpio-map-mask = <0xffffffe0 0xffffffc0>;
351 gpio-map-pass-thru = <0x1f 0x3f>;
352 gpio-map = <
359 #gpio-cells = <2>;
360 #address-cells = <1>;
361 #size-cells = <0>;
365 compatible = "ambiq,gpio-bank";
366 gpio-controller;
367 #gpio-cells = <2>;
374 compatible = "ambiq,gpio-bank";
375 gpio-controller;
376 #gpio-cells = <2>;
383 compatible = "ambiq,gpio-bank";
384 gpio-controller;
385 #gpio-cells = <2>;
392 compatible = "ambiq,gpio-bank";
393 gpio-controller;
394 #gpio-cells = <2>;
405 interrupts = <1 0>;
406 clock-frequency = <16>;
414 arm,num-irq-priority-bits = <3>;