Lines Matching +full:fifo +full:- +full:depth
4 * SPDX-License-Identifier: Apache-2.0
9 //#include <zephyr/dt-bindings/i2c/i2c.h>
10 #include <zephyr/dt-bindings/gpio/gpio.h>
16 #address-cells = <1>;
17 #size-cells = <0>;
26 intc: arcv2-intc {
27 compatible = "snps,arcv2-intc";
28 interrupt-controller;
29 #interrupt-cells = <2>;
33 compatible = "snps,arc-timer";
35 interrupt-parent = <&intc>;
48 /* this is (Pseudo SRAM), so treat it like mmio-sram */
50 compatible = "mmio-sram";
54 spiclk: spi-clock {
55 compatible = "fixed-clock";
56 clock-frequency = <1000000>;
57 #clock-cells = <0>;
61 #address-cells = <1>;
62 #size-cells = <1>;
63 compatible = "simple-bus";
69 clock-frequency = <DT_APB_CLK_HZ>;
71 interrupt-parent = <&intc>;
72 reg-shift = <2>;
76 compatible = "snps,designware-gpio";
79 interrupt-parent = <&intc>;
80 gpio-controller;
81 #gpio-cells = <2>;
85 compatible = "snps,designware-gpio";
88 gpio-controller;
89 #gpio-cells = <2>;
94 compatible = "snps,designware-spi";
97 fifo-depth = <32>;
98 max-xfer-size = <16>;
99 interrupt-parent = <&intc>;
100 #address-cells = <1>;
101 #size-cells = <0>;
106 compatible = "snps,emsdp-pinctrl";
110 /* SPI-flash for user data */
112 compatible = "snps,designware-spi";
115 fifo-depth = <32>;
116 max-xfer-size = <16>;
117 interrupt-parent = <&intc>;
118 #address-cells = <1>;
119 #size-cells = <0>;
121 compatible = "spansion,s25fl256s", "jedec,spi-nor";
124 spi-max-frequency = <100000>;
126 jedec-id = [01 02 19];
130 /* DFSS-SPI0 */
132 compatible = "snps,designware-spi";
133 #address-cells = <1>;
134 #size-cells = <0>;
138 interrupt-names = "err_int", "rx_avail", "tx_req";
139 interrupt-parent = <&intc>;
140 aux-reg;
141 fifo-depth = <16>;
142 max-xfer-size = <16>;
145 /* DFSS-SPI1 */
147 compatible = "snps,designware-spi";
148 #address-cells = <1>;
149 #size-cells = <0>;
153 interrupt-names = "err_int", "rx_avail", "tx_req";
154 interrupt-parent = <&intc>;
155 aux-reg;
156 fifo-depth = <16>;
157 max-xfer-size = <16>;