4  * SPDX-License-Identifier: Apache-2.0
13  * - Once the watchdog disable bit is set, it cannot be cleared till next
15  * - Since the MCU boots with WDT enabled, the CONFIG_WDT_DISABLE_AT_BOOT
18  * - If the application needs to use the watchdog in the system, then
40 	uint32_t mode;  member
49 	const struct wdt_sam_dev_cfg *config = dev->config;  in wdt_sam_isr()
51 	Wdt * const wdt = config->regs;  in wdt_sam_isr()
52 	struct wdt_sam_dev_data *data = dev->data;  in wdt_sam_isr()
55 	wdt_sr = wdt->WDT_SR;  in wdt_sam_isr()
57 	data->cb(dev, 0);  in wdt_sam_isr()
77 		return -EINVAL;  in wdt_sam_convert_timeout()
85 	const struct wdt_sam_dev_cfg *config = dev->config;  in wdt_sam_disable()
87 	Wdt * const wdt = config->regs;  in wdt_sam_disable()
88 	struct wdt_sam_dev_data *data = dev->data;  in wdt_sam_disable()
90 	/* since Watchdog mode register is 'write-once', we can't disable if  in wdt_sam_disable()
91 	 * someone has already set the mode register  in wdt_sam_disable()
93 	if (data->mode_set) {  in wdt_sam_disable()
94 		return -EPERM;  in wdt_sam_disable()
97 	/* do we handle -EFAULT here */  in wdt_sam_disable()
99 	/* Watchdog Mode register is 'write-once' only register.  in wdt_sam_disable()
102 	wdt->WDT_MR |= WDT_MR_WDDIS;  in wdt_sam_disable()
103 	data->mode_set = true;  in wdt_sam_disable()
110 	const struct wdt_sam_dev_cfg *config = dev->config;  in wdt_sam_setup()
112 	Wdt * const wdt = config->regs;  in wdt_sam_setup()
113 	struct wdt_sam_dev_data *data = dev->data;  in wdt_sam_setup()
115 	if (!data->timeout_valid) {  in wdt_sam_setup()
117 		return -EINVAL;  in wdt_sam_setup()
120 	/* since Watchdog mode register is 'write-once', we can't set if  in wdt_sam_setup()
121 	 * someone has already set the mode register  in wdt_sam_setup()
123 	if (data->mode_set) {  in wdt_sam_setup()
124 		return -EPERM;  in wdt_sam_setup()
128 		data->mode |= WDT_MR_WDIDLEHLT;  in wdt_sam_setup()
133 		data->mode |= WDT_MR_WDDBGHLT;  in wdt_sam_setup()
136 	wdt->WDT_MR = data->mode;  in wdt_sam_setup()
137 	data->mode_set = true;  in wdt_sam_setup()
148 	struct wdt_sam_dev_data *data = dev->data;  in wdt_sam_install_timeout()
150 	if (data->timeout_valid) {  in wdt_sam_install_timeout()
152 		return -ENOMEM;  in wdt_sam_install_timeout()
155 	if (cfg->window.min != 0U) {  in wdt_sam_install_timeout()
156 		return -EINVAL;  in wdt_sam_install_timeout()
160 	 * Convert time to cycles. SAM3X SoC doesn't supports window  in wdt_sam_install_timeout()
164 	timeout_value = wdt_sam_convert_timeout(cfg->window.max,  in wdt_sam_install_timeout()
168 		return -EINVAL;  in wdt_sam_install_timeout()
171 	switch (cfg->flags) {  in wdt_sam_install_timeout()
179 		if (cfg->callback) {  in wdt_sam_install_timeout()
181 			data->cb = cfg->callback;  in wdt_sam_install_timeout()
184 			return -EINVAL;  in wdt_sam_install_timeout()
188 		/* Processor only reset mode not available in same70 series */  in wdt_sam_install_timeout()
192 		LOG_DBG("Configuring reset CPU only mode\n");  in wdt_sam_install_timeout()
199 		return -ENOTSUP;  in wdt_sam_install_timeout()
202 	data->mode = wdt_mode |  in wdt_sam_install_timeout()
206 	data->timeout_valid = true;  in wdt_sam_install_timeout()
213 	const struct wdt_sam_dev_cfg *config = dev->config;  in wdt_sam_feed()
217 	 * reloaded/fed with the 12-bit watchdog counter  in wdt_sam_feed()
220 	Wdt * const wdt = config->regs;  in wdt_sam_feed()
222 	wdt->WDT_CR |= WDT_CR_KEY_PASSWD | WDT_CR_WDRSTT;  in wdt_sam_feed()