Lines Matching +full:pulse +full:- +full:width

1 /* SPDX-License-Identifier: Apache-2.0 */
19  * and programmed based on user-defined options.
62  * Reset pulse length
116  * bits WDT_CNT_WIDTH - 1 to 0
190  * The Watchdog Timer counter width.
209  * The reset pulse length that is available directly after reset.
214  * Width of the APB Data Bus to which this component is attached.
219  * APB data width is 8 bits
224  * APB data width is 16 bits
229  * APB data width is 32 bits
241  * of 2 from 2^16 to 2^(WDT_CNT_WIDTH-1). When this parameter is set to 0, the user must define the
242  * timeout period range (2^8 to 2^(WDT_CNT_WIDTH)-1) using the WDT_USER_TOP_(i) parameter.
252  * Configures the reset pulse length to be hard coded.
295  * followed by a 16-bit unsigned number.
339  * @brief Set reset pulse length.
342  * @param pclk_cycles Reset pulse length selector (2 to 256 pclk cycles)
400  * @param wdt_counter_width Watchdog Timer counter width
408 	current_counter_value &= (1 << (wdt_counter_width - 1));  in dw_wdt_current_counter_value_register_get()
493  * @brief Get the Watchdog timer counter width.
496  * @return Width of the counter register
533  * @brief The reset pulse length that is available directly after reset.
536  * @return Reset pulse length
544  * @brief Width of the APB Data Bus to which this component is attached.
547  * @return APB data width
548  *	   0x0 (APB_8BITS): APB data width is 8 bits
549  *	   0x1 (APB_16BITS): APB data width is 16 bits
550  *	   0x2 (APB_32BITS): APB data width is 32 bits
576  * of 2 from 2^16 to 2^(WDT_CNT_WIDTH-1). When this parameter is set to 0, the user must define the
577  * timeout period range (2^8 to 2^(WDT_CNT_WIDTH)-1) using the WDT_USER_TOP_(i) parameter.
603  * @brief Checks if reset pulse length is hardcoded.
606  * @return 0x0 (PROGRAMMABLE): Reset pulse length is programmable
607  *	   0x1 (HARDCODED): Reset pulse length is hardcoded