Lines Matching +full:time +full:- +full:out
1 /* SPDX-License-Identifier: Apache-2.0 */
19 * and programmed based on user-defined options.
57 * by the time a second timeout occurs then generate a system reset
86 #define TORR_USER0_OR_64K 0x0 /* Time out of WDT_USER_TOP_0 or 64K Clocks */
87 #define TORR_USER1_OR_128K 0x1 /* Time out of WDT_USER_TOP_1 or 128K Clocks */
88 #define TORR_USER2_OR_256K 0x2 /* Time out of WDT_USER_TOP_2 or 256K Clocks */
89 #define TORR_USER3_OR_512K 0x3 /* Time out of WDT_USER_TOP_3 or 512K Clocks */
90 #define TORR_USER4_OR_1M 0x4 /* Time out of WDT_USER_TOP_4 or 1M Clocks */
91 #define TORR_USER5_OR_2M 0x5 /* Time out of WDT_USER_TOP_5 or 2M Clocks */
92 #define TORR_USER6_OR_4M 0x6 /* Time out of WDT_USER_TOP_6 or 4M Clocks */
93 #define TORR_USER7_OR_8M 0x7 /* Time out of WDT_USER_TOP_7 or 8M Clocks */
94 #define TORR_USER8_OR_16M 0x8 /* Time out of WDT_USER_TOP_8 or 16M Clocks */
95 #define TORR_USER9_OR_32M 0x9 /* Time out of WDT_USER_TOP_9 or 32M Clocks */
96 #define TORR_USER10_OR_64M 0xa /* Time out of WDT_USER_TOP_10 or 64M Clocks */
97 #define TORR_USER11_OR_128M 0xb /* Time out of WDT_USER_TOP_11 or 128M Clocks */
98 #define TORR_USER12_OR_256M 0xc /* Time out of WDT_USER_TOP_12 or 256M Clocks */
99 #define TORR_USER13_OR_512M 0xd /* Time out of WDT_USER_TOP_13 or 512M Clocks */
100 #define TORR_USER14_OR_1G 0xe /* Time out of WDT_USER_TOP_14 or 1G Clocks */
101 #define TORR_USER15_OR_2G 0xf /* Time out of WDT_USER_TOP_15 or 2G Clocks */
116 * bits WDT_CNT_WIDTH - 1 to 0
196 * reset value of the register. If WDT_HC_TOP is 1, then the default initial time period is the
241 * of 2 from 2^16 to 2^(WDT_CNT_WIDTH-1). When this parameter is set to 0, the user must define the
242 * timeout period range (2^8 to 2^(WDT_CNT_WIDTH)-1) using the WDT_USER_TOP_(i) parameter.
295 * followed by a 16-bit unsigned number.
322 * true = First generate an interrupt and even if it is cleared by the time a second
408 current_counter_value &= (1 << (wdt_counter_width - 1)); in dw_wdt_current_counter_value_register_get()
506 * It controls the reset value of the register. If WDT_HC_TOP is 1, then the default initial time
576 * of 2 from 2^16 to 2^(WDT_CNT_WIDTH-1). When this parameter is set to 0, the user must define the
577 * timeout period range (2^8 to 2^(WDT_CNT_WIDTH)-1) using the WDT_USER_TOP_(i) parameter.