22 	const struct w1_ds2477_85_config *cfg = dev->config;  in ds2477_85_write_port_config()  local
29 	ret = i2c_write_dt(&cfg->i2c_spec, buf, (CMD_WR_W1_PORT_CFG_LEN + CMD_OVERHEAD_LEN));  in ds2477_85_write_port_config()
34 	k_usleep(cfg->t_op_us);  in ds2477_85_write_port_config()
36 	ret = i2c_read_dt(&cfg->i2c_spec, buf, 2);  in ds2477_85_write_port_config()
49 	const struct w1_ds2477_85_config *cfg = dev->config;  in ds2477_85_read_port_config()  local
55 	ret = i2c_write_dt(&cfg->i2c_spec, buf, (CMD_RD_W1_PORT_CFG_LEN + CMD_OVERHEAD_LEN));  in ds2477_85_read_port_config()
60 	k_usleep(cfg->t_op_us);  in ds2477_85_read_port_config()
62 	ret = i2c_read_dt(&cfg->i2c_spec, buf, 4);  in ds2477_85_read_port_config()
77 	const struct w1_ds2477_85_config *cfg = dev->config;  in ds2477_85_reset_master()  local
81 	ret = i2c_write_dt(&cfg->i2c_spec, buf, 1);  in ds2477_85_reset_master()
87 	k_usleep(cfg->t_op_us);  in ds2477_85_reset_master()
89 	ret = i2c_read_dt(&cfg->i2c_spec, buf, 2);  in ds2477_85_reset_master()
102 	const struct w1_ds2477_85_config *cfg = dev->config;  in ds2477_85_reset_bus()  local
104 	uint16_t delay_us = cfg->mode_timing[data->master_reg.od_active].t_reset;  in ds2477_85_reset_bus()
110 	ret = cfg->w1_script_cmd(dev, delay_us, SCRIPT_OW_RESET, &tx_data, 1, &rx_data, 1);  in ds2477_85_reset_bus()
126 	const struct w1_ds2477_85_config *cfg = dev->config;  in ds2477_85_read_bit()  local
128 	uint16_t delay_us = cfg->mode_timing[data->master_reg.od_active].t_slot;  in ds2477_85_read_bit()
132 	ret = cfg->w1_script_cmd(dev, delay_us, SCRIPT_OW_READ_BIT, NULL, 0, &rx_data, 1);  in ds2477_85_read_bit()
142 	const struct w1_ds2477_85_config *cfg = dev->config;  in ds2477_85_write_bit()  local
144 	uint16_t delay_us = cfg->mode_timing[data->master_reg.od_active].t_slot;  in ds2477_85_write_bit()
149 	ret = cfg->w1_script_cmd(dev, delay_us, SCRIPT_OW_WRITE_BIT, &tx_data, 1, &rx_data, 1);  in ds2477_85_write_bit()
159 	const struct w1_ds2477_85_config *cfg = dev->config;  in ds2477_85_read_byte()  local
161 	uint16_t delay_us = cfg->mode_timing[data->master_reg.od_active].t_slot * 8;  in ds2477_85_read_byte()
165 	ret = cfg->w1_script_cmd(dev, delay_us, SCRIPT_OW_READ_BYTE, NULL, 0, &rx_data, 1);  in ds2477_85_read_byte()
175 	const struct w1_ds2477_85_config *cfg = dev->config;  in ds2477_85_write_byte()  local
177 	uint16_t delay_us = cfg->mode_timing[data->master_reg.od_active].t_slot * 8;  in ds2477_85_write_byte()
181 	ret = cfg->w1_script_cmd(dev, delay_us, SCRIPT_OW_WRITE_BYTE, &tx_byte, 1, &rx_data, 1);  in ds2477_85_write_byte()
191 	const struct w1_ds2477_85_config *cfg = dev->config;  in ds2477_85_write_block()  local
193 	int w1_timing = cfg->mode_timing[data->master_reg.od_active].t_slot * 8 * tx_len;  in ds2477_85_write_block()
207 	ret = i2c_transfer_dt(&cfg->i2c_spec, tx_msg, 2);  in ds2477_85_write_block()
213 	k_usleep(cfg->t_op_us + (cfg->t_seq_us * tx_len) +  w1_timing);  in ds2477_85_write_block()
215 	ret = i2c_read_dt(&cfg->i2c_spec, buf, 2);  in ds2477_85_write_block()
228 	const struct w1_ds2477_85_config *cfg = dev->config;  in ds2477_85_read_block()  local
230 	int w1_timing = cfg->mode_timing[data->master_reg.od_active].t_slot * 8 * rx_len;  in ds2477_85_read_block()
244 	ret = i2c_write_dt(&cfg->i2c_spec, buf, (CMD_RD_BLOCK_LEN + CMD_OVERHEAD_LEN));  in ds2477_85_read_block()
250 	k_usleep(cfg->t_op_us + (cfg->t_seq_us * rx_len) +  w1_timing);  in ds2477_85_read_block()
252 	ret = i2c_transfer_dt(&cfg->i2c_spec, rx_msg, 2);  in ds2477_85_read_block()
282 	const struct w1_ds2477_85_config *cfg = dev->config;  in w1_ds2477_85_init()  local
285 	data->master_reg.apu = cfg->apu;  in w1_ds2477_85_init()
292 	if (ds2477_85_write_port_config(dev, PORT_REG_RPUP_BUF, cfg->rpup_buf) < 0) {  in w1_ds2477_85_init()
296 	if (ds2477_85_write_port_config(dev, PORT_REG_PDSLEW, cfg->pdslew) < 0) {  in w1_ds2477_85_init()
300 	LOG_DBG("cfg: rpup_buf=%02x, pdslew:%02x", cfg->rpup_buf, cfg->pdslew);  in w1_ds2477_85_init()
306 		cfg->master_config.slave_count);  in w1_ds2477_85_init()