4  * SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/drivers/video-controls.h>
732 	} while (tries--);  in gc2145_write_reg()
757 	} while (tries--);  in gc2145_read_reg()
766 	const struct gc2145_config *cfg = dev->config;  in gc2145_write_all()
771 		ret = gc2145_write_reg(&cfg->i2c, regs[i].addr, regs[i].value);  in gc2145_write_all()
783 	const struct gc2145_config *cfg = dev->config;  in gc2145_soft_reset()
786 	ret = gc2145_write_reg(&cfg->i2c, GC2145_REG_RESET, GC2145_REG_SW_RESET);  in gc2145_soft_reset()
796 	const struct gc2145_config *cfg = dev->config;  in gc2145_set_ctrl_vflip()
799 	ret = gc2145_read_reg(&cfg->i2c, GC2145_REG_AMODE1, &old_value);  in gc2145_set_ctrl_vflip()
805 	return gc2145_write_reg(&cfg->i2c, GC2145_REG_AMODE1,  in gc2145_set_ctrl_vflip()
812 	const struct gc2145_config *cfg = dev->config;  in gc2145_set_ctrl_hmirror()
815 	ret = gc2145_read_reg(&cfg->i2c, GC2145_REG_AMODE1, &old_value);  in gc2145_set_ctrl_hmirror()
821 	return gc2145_write_reg(&cfg->i2c, GC2145_REG_AMODE1,  in gc2145_set_ctrl_hmirror()
829 	const struct gc2145_config *cfg = dev->config;  in gc2145_set_window()
831 	ret = gc2145_write_reg(&cfg->i2c, GC2145_REG_RESET, GC2145_SET_P0_REGS);  in gc2145_set_window()
836 	/* Y/row offset */  in gc2145_set_window()
837 	ret = gc2145_write_reg(&cfg->i2c, reg++, y >> 8);  in gc2145_set_window()
842 	ret = gc2145_write_reg(&cfg->i2c, reg++, y & 0xff);  in gc2145_set_window()
847 	/* X/col offset */  in gc2145_set_window()
848 	ret = gc2145_write_reg(&cfg->i2c, reg++, x >> 8);  in gc2145_set_window()
853 	ret = gc2145_write_reg(&cfg->i2c, reg++, x & 0xff);  in gc2145_set_window()
859 	ret = gc2145_write_reg(&cfg->i2c, reg++, h >> 8);  in gc2145_set_window()
864 	ret = gc2145_write_reg(&cfg->i2c, reg++, h & 0xff);  in gc2145_set_window()
870 	ret = gc2145_write_reg(&cfg->i2c, reg++, w >> 8);  in gc2145_set_window()
875 	ret = gc2145_write_reg(&cfg->i2c, reg++, w & 0xff);  in gc2145_set_window()
886 	const struct gc2145_config *cfg = dev->config;  in gc2145_set_output_format()
888 	ret = gc2145_write_reg(&cfg->i2c, GC2145_REG_RESET, GC2145_SET_P0_REGS);  in gc2145_set_output_format()
895 		return -ENOTSUP;  in gc2145_set_output_format()
899 	ret = gc2145_write_reg(&cfg->i2c, GC2145_REG_OUTPUT_FMT, GC2145_REG_OUTPUT_FMT_RGB565);  in gc2145_set_output_format()
912 	const struct gc2145_config *cfg = dev->config;  in gc2145_set_resolution()
926 		return -EIO;  in gc2145_set_resolution()
948 		return -EIO;  in gc2145_set_resolution()
954 	x = (((win_w / c_ratio) - w) / 2);  in gc2145_set_resolution()
955 	y = (((win_h / r_ratio) - h) / 2);  in gc2145_set_resolution()
956 	win_x = ((UXGA_HSIZE - win_w) / 2);  in gc2145_set_resolution()
957 	win_y = ((UXGA_VSIZE - win_h) / 2);  in gc2145_set_resolution()
973 	ret = gc2145_write_reg(&cfg->i2c, GC2145_REG_CROP_ENABLE, GC2145_CROP_SET_ENABLE);  in gc2145_set_resolution()
978 	/* Set Sub-sampling ratio and mode */  in gc2145_set_resolution()
979 	ret = gc2145_write_reg(&cfg->i2c, GC2145_REG_SUBSAMPLE, ((r_ratio << 4) | c_ratio));  in gc2145_set_resolution()
984 	ret = gc2145_write_reg(&cfg->i2c, GC2145_REG_SUBSAMPLE_MODE, GC2145_SUBSAMPLE_MODE_SMOOTH);  in gc2145_set_resolution()
1002 	const struct gc2145_config *cfg = dev->config;  in gc2145_check_connection()
1006 	ret = gc2145_read_reg(&cfg->i2c, 0xf0, &reg_pid_val);  in gc2145_check_connection()
1011 	ret = gc2145_read_reg(&cfg->i2c, 0xf1, &reg_ver_val);  in gc2145_check_connection()
1026 	struct gc2145_data *drv_data = dev->data;  in gc2145_set_fmt()
1031 	if (fmt->pixelformat != VIDEO_PIX_FMT_RGB565) {  in gc2145_set_fmt()
1033 		return -ENOTSUP;  in gc2145_set_fmt()
1036 	if (memcmp(&drv_data->fmt, fmt, sizeof(drv_data->fmt)) == 0) {  in gc2145_set_fmt()
1043 		if (fmts[i].width_min == fmt->width && fmts[i].height_min == fmt->height &&  in gc2145_set_fmt()
1044 		    fmts[i].pixelformat == fmt->pixelformat) {  in gc2145_set_fmt()
1051 		return -ENOTSUP;  in gc2145_set_fmt()
1054 	drv_data->fmt = *fmt;  in gc2145_set_fmt()
1057 	ret = gc2145_set_output_format(dev, fmt->pixelformat);  in gc2145_set_fmt()
1076 	struct gc2145_data *drv_data = dev->data;  in gc2145_get_fmt()
1078 	*fmt = drv_data->fmt;  in gc2145_get_fmt()
1085 	const struct gc2145_config *cfg = dev->config;  in gc2145_stream_start()
1087 	return gc2145_write_reg(&cfg->i2c, 0xf2, 0x0f);  in gc2145_stream_start()
1092 	const struct gc2145_config *cfg = dev->config;  in gc2145_stream_stop()
1094 	return gc2145_write_reg(&cfg->i2c, 0xf2, 0x00);  in gc2145_stream_stop()
1100 	caps->format_caps = fmts;  in gc2145_get_caps()
1112 		return -ENOTSUP;  in gc2145_set_ctrl()
1131 	const struct gc2145_config *cfg = dev->config;  in gc2145_init()
1133 	ret = gpio_pin_configure_dt(&cfg->reset_gpio, GPIO_OUTPUT_ACTIVE);  in gc2145_init()
1139 	gpio_pin_set_dt(&cfg->reset_gpio, 0);  in gc2145_init()
1177 	const struct gc2145_config *cfg = dev->config;  in gc2145_init_0()
1179 	if (!i2c_is_ready_dt(&cfg->i2c)) {  in gc2145_init_0()
1181 		return -ENODEV;  in gc2145_init_0()
1185 	if (!gpio_is_ready_dt(&cfg->reset_gpio)) {  in gc2145_init_0()
1186 		LOG_ERR("%s: device %s is not ready", dev->name, cfg->reset_gpio.port->name);  in gc2145_init_0()
1187 		return -ENODEV;  in gc2145_init_0()