Lines Matching +full:periodic +full:- +full:trigger
2 * Copyright (c) 2018-2021 Intel Corporation
4 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h>
25 * specific. The timers are implemented as a single up-counter with
30 * generate periodic interrupt.
39 * COUNTER_CLK_PERIOD is not in femtoseconds (1e-15 sec).
116 * 32-bit of the General Capabilities and ID Register. This can
209 /* COUNTER_CLK_PERIOD (CLK_PERIOD_REG) is in femtoseconds (1e-15 sec) */
214 * HPET_INT_LEVEL_TRIGGER is used to set HPET interrupt as level trigger
263 if (unlikely((int64_t)(next - now) <= 0)) { in hpet_timer_comparator_set_safe()
271 } while ((int64_t)(next - now) <= 0); in hpet_timer_comparator_set_safe()
286 * Clear interrupt only if level trigger is selected. in hpet_isr()
287 * When edge trigger is selected, spec says only 0 can in hpet_isr()
300 int64_t diff = (int64_t)(now - last_count); in hpet_isr()
306 uint32_t dticks = (uint32_t)((now - last_count) / cyc_per_tick); in hpet_isr()
327 /* 5-bit IRQ field starting at bit 9 */ in config_timer0()
331 /* Set level trigger if selected */ in config_timer0()
345 /* Noop, the HPET is a single system-wide device and it's in smp_timer_init()
386 uint32_t ret = (uint32_t)((now - last_count) / cyc_per_tick); in sys_clock_elapsed()