Lines Matching +full:write +full:- +full:inactive +full:- +full:cycles
4 * SPDX-License-Identifier: Apache-2.0
47 /* Bi-directional mode */
106 cfg->regs->SPI_CTRL_REG |= SPI_SPI_CTRL_REG_SPI_ON_Msk; in spi_smartbond_enable()
107 cfg->regs->SPI_CTRL_REG &= ~SPI_SPI_CTRL_REG_SPI_RST_Msk; in spi_smartbond_enable()
109 cfg->regs->SPI_CTRL_REG &= ~SPI_SPI_CTRL_REG_SPI_ON_Msk; in spi_smartbond_enable()
110 cfg->regs->SPI_CTRL_REG |= SPI_SPI_CTRL_REG_SPI_RST_Msk; in spi_smartbond_enable()
116 return (!!(cfg->regs->SPI_CTRL_REG & SPI_SPI_CTRL_REG_SPI_ON_Msk)) && in spi_smartbond_isenabled()
117 (!(cfg->regs->SPI_CTRL_REG & SPI_SPI_CTRL_REG_SPI_RST_Msk)); in spi_smartbond_isenabled()
122 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_write_word()
123 struct spi_smartbond_data *data = dev->data; in spi_smartbond_write_word()
127 * generate the necessary clock cycles based on the data size. in spi_smartbond_write_word()
129 switch (data->dfs) { in spi_smartbond_write_word()
131 cfg->regs->SPI_RX_TX_REG = *(uint8_t *)data->ctx.tx_buf; in spi_smartbond_write_word()
134 cfg->regs->SPI_RX_TX_REG = sys_get_le16(data->ctx.tx_buf); in spi_smartbond_write_word()
137 cfg->regs->SPI_RX_TX_REG = sys_get_le32(data->ctx.tx_buf); in spi_smartbond_write_word()
144 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_write_dummy()
146 cfg->regs->SPI_RX_TX_REG = 0x0; in spi_smartbond_write_dummy()
151 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_read_word()
152 struct spi_smartbond_data *data = dev->data; in spi_smartbond_read_word()
154 switch (data->dfs) { in spi_smartbond_read_word()
156 *(uint8_t *)data->ctx.rx_buf = cfg->regs->SPI_RX_TX_REG; in spi_smartbond_read_word()
159 sys_put_le16((uint16_t)cfg->regs->SPI_RX_TX_REG, data->ctx.rx_buf); in spi_smartbond_read_word()
162 sys_put_le32(cfg->regs->SPI_RX_TX_REG, data->ctx.rx_buf); in spi_smartbond_read_word()
169 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_read_discard()
171 (void)cfg->regs->SPI_RX_TX_REG; in spi_smartbond_read_discard()
179 return -ENOTSUP; in spi_smartbond_set_speed()
181 cfg->regs->SPI_CTRL_REG = in spi_smartbond_set_speed()
182 (cfg->regs->SPI_CTRL_REG & ~SPI_SPI_CTRL_REG_SPI_CLK_Msk) | in spi_smartbond_set_speed()
185 cfg->regs->SPI_CTRL_REG = (cfg->regs->SPI_CTRL_REG & ~SPI_SPI_CTRL_REG_SPI_CLK_Msk); in spi_smartbond_set_speed()
187 cfg->regs->SPI_CTRL_REG = in spi_smartbond_set_speed()
188 (cfg->regs->SPI_CTRL_REG & ~SPI_SPI_CTRL_REG_SPI_CLK_Msk) | in spi_smartbond_set_speed()
191 cfg->regs->SPI_CTRL_REG = in spi_smartbond_set_speed()
192 (cfg->regs->SPI_CTRL_REG & ~SPI_SPI_CTRL_REG_SPI_CLK_Msk) | in spi_smartbond_set_speed()
204 data->dfs = 1; in spi_smartbond_set_word_size()
205 cfg->regs->SPI_CTRL_REG = in spi_smartbond_set_word_size()
206 (cfg->regs->SPI_CTRL_REG & ~SPI_SPI_CTRL_REG_SPI_WORD_Msk); in spi_smartbond_set_word_size()
209 data->dfs = 2; in spi_smartbond_set_word_size()
210 cfg->regs->SPI_CTRL_REG = in spi_smartbond_set_word_size()
211 (cfg->regs->SPI_CTRL_REG & ~SPI_SPI_CTRL_REG_SPI_WORD_Msk) | in spi_smartbond_set_word_size()
215 data->dfs = 4; in spi_smartbond_set_word_size()
216 cfg->regs->SPI_CTRL_REG = in spi_smartbond_set_word_size()
217 (cfg->regs->SPI_CTRL_REG & ~SPI_SPI_CTRL_REG_SPI_WORD_Msk) | in spi_smartbond_set_word_size()
222 return -ENOTSUP; in spi_smartbond_set_word_size()
257 if (spi_context_configured(&data->ctx, spi_cfg)) { in spi_smartbond_configure()
264 if (spi_cfg->operation & SPI_OP_MODE_SLAVE) { in spi_smartbond_configure()
266 return -ENOTSUP; in spi_smartbond_configure()
269 if (spi_cfg->operation & SPI_HALF_DUPLEX) { in spi_smartbond_configure()
270 LOG_ERR("Half-duplex not supported"); in spi_smartbond_configure()
271 return -ENOTSUP; in spi_smartbond_configure()
275 (spi_cfg->operation & SPI_LINES_MASK) != SPI_LINES_SINGLE) { in spi_smartbond_configure()
277 return -ENOTSUP; in spi_smartbond_configure()
280 if (spi_cfg->operation & SPI_MODE_LOOP) { in spi_smartbond_configure()
282 return -ENOTSUP; in spi_smartbond_configure()
289 rc = spi_smartbond_set_speed(cfg, spi_cfg->frequency); in spi_smartbond_configure()
294 cfg->regs->SPI_CTRL_REG = in spi_smartbond_configure()
295 (spi_cfg->operation & SPI_MODE_CPOL) in spi_smartbond_configure()
296 ? (cfg->regs->SPI_CTRL_REG | SPI_SPI_CTRL_REG_SPI_POL_Msk) in spi_smartbond_configure()
297 : (cfg->regs->SPI_CTRL_REG & ~SPI_SPI_CTRL_REG_SPI_POL_Msk); in spi_smartbond_configure()
299 cfg->regs->SPI_CTRL_REG = in spi_smartbond_configure()
300 (spi_cfg->operation & SPI_MODE_CPHA) in spi_smartbond_configure()
301 ? (cfg->regs->SPI_CTRL_REG | SPI_SPI_CTRL_REG_SPI_PHA_Msk) in spi_smartbond_configure()
302 : (cfg->regs->SPI_CTRL_REG & ~SPI_SPI_CTRL_REG_SPI_PHA_Msk); in spi_smartbond_configure()
304 rc = spi_smartbond_set_word_size(cfg, data, spi_cfg->operation); in spi_smartbond_configure()
309 cfg->regs->SPI_CTRL_REG &= ~(SPI_SPI_CTRL_REG_SPI_FIFO_MODE_Msk); in spi_smartbond_configure()
313 cfg->regs->SPI_CTRL_REG &= ~SPI_SPI_CTRL_REG_SPI_MINT_Msk; in spi_smartbond_configure()
315 data->ctx.config = spi_cfg; in spi_smartbond_configure()
323 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_isr_set_status()
326 cfg->regs->SPI_CTRL_REG |= SPI_SPI_CTRL_REG_SPI_MINT_Msk; in spi_smartbond_isr_set_status()
328 cfg->regs->SPI_CTRL_REG &= ~SPI_SPI_CTRL_REG_SPI_MINT_Msk; in spi_smartbond_isr_set_status()
334 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_is_busy()
336 return (cfg->regs->SPI_CTRL_REG & SPI_SPI_CTRL_REG_SPI_BUSY_Msk); in spi_smartbond_is_busy()
341 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_clear_interrupt()
343 cfg->regs->SPI_CLEAR_INT_REG = 0x1; in spi_smartbond_clear_interrupt()
349 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_is_rx_data()
351 return (cfg->regs->SPI_CTRL_REG & SPI_SPI_CTRL_REG_SPI_INT_BIT_Msk); in spi_smartbond_is_rx_data()
356 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_get_fifo_mode()
358 return ((cfg->regs->SPI_CTRL_REG & SPI_SPI_CTRL_REG_SPI_FIFO_MODE_Msk) >> in spi_smartbond_get_fifo_mode()
364 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_set_fifo_mode()
367 uint32_t spi_ctrl_reg = cfg->regs->SPI_CTRL_REG; in spi_smartbond_set_fifo_mode()
370 struct spi_smartbond_data *data = dev->data; in spi_smartbond_set_fifo_mode()
375 || (data->dfs == 4) in spi_smartbond_set_fifo_mode()
384 cfg->regs->SPI_CTRL_REG &= ~SPI_SPI_CTRL_REG_SPI_ON_Msk; in spi_smartbond_set_fifo_mode()
389 * for 4-byte bus length. in spi_smartbond_set_fifo_mode()
391 if (data->dfs == 4) { in spi_smartbond_set_fifo_mode()
408 cfg->regs->SPI_CTRL_REG = spi_ctrl_reg; in spi_smartbond_set_fifo_mode()
414 struct spi_smartbond_data *data = dev->data; in spi_smartbond_transfer_mode_get()
415 struct spi_context *ctx = &data->ctx; in spi_smartbond_transfer_mode_get()
420 * In such a case the context should be updated and a dummy write/read should in spi_smartbond_transfer_mode_get()
423 if (ctx->rx_len || ctx->tx_len) { in spi_smartbond_transfer_mode_get()
436 * is a bit tricky as the controller should generate clock cycles in spi_smartbond_transfer_mode_get()
450 struct spi_smartbond_data *data = dev->data; in spi_smartbond_transfer_mode_check_and_update()
452 data->transfer_mode = spi_smartbond_transfer_mode_get(dev); in spi_smartbond_transfer_mode_check_and_update()
459 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_is_tx_full()
461 return (cfg->regs->SPI_CTRL_REG & SPI_SPI_CTRL_REG_SPI_TXH_Msk); in spi_smartbond_is_tx_full()
466 struct spi_smartbond_data *data = dev->data; in spi_smartbond_write()
467 struct spi_context *ctx = &data->ctx; in spi_smartbond_write()
477 spi_context_update_tx(ctx, data->dfs, 1); in spi_smartbond_write()
480 * It might happen that a NULL buffer with a non-zero length is provided. in spi_smartbond_write()
483 if (ctx->rx_len && !ctx->rx_buf) { in spi_smartbond_write()
485 spi_context_update_rx(ctx, data->dfs, 1); in spi_smartbond_write()
492 struct spi_smartbond_data *data = dev->data; in spi_smartbond_transfer()
493 struct spi_context *ctx = &data->ctx; in spi_smartbond_transfer()
495 while (data->rx_len) { in spi_smartbond_transfer()
501 if (ctx->rx_buf) { in spi_smartbond_transfer()
506 spi_context_update_rx(ctx, data->dfs, 1); in spi_smartbond_transfer()
510 data->rx_len--; in spi_smartbond_transfer()
511 data->transferred++; in spi_smartbond_transfer()
514 while (data->tx_len) { in spi_smartbond_transfer()
520 if (ctx->tx_buf) { in spi_smartbond_transfer()
525 spi_context_update_tx(ctx, data->dfs, 1); in spi_smartbond_transfer()
527 data->tx_len--; in spi_smartbond_transfer()
533 struct spi_smartbond_data *data = dev->data; in spi_smartbond_read()
534 struct spi_context *ctx = &data->ctx; in spi_smartbond_read()
543 spi_context_update_rx(ctx, data->dfs, 1); in spi_smartbond_read()
547 /* Perform dummy access to generate the required clock cycles */ in spi_smartbond_read()
548 while (data->tx_len) { in spi_smartbond_read()
554 data->tx_len--; in spi_smartbond_read()
560 struct spi_smartbond_data *data = dev->data; in spi_smartbond_isr_trigger()
561 struct spi_context *ctx = &data->ctx; in spi_smartbond_isr_trigger()
563 data->transfer_mode = spi_smartbond_transfer_mode_get(dev); in spi_smartbond_isr_trigger()
565 switch (data->transfer_mode) { in spi_smartbond_isr_trigger()
567 data->tx_len = spi_context_total_rx_len(ctx); in spi_smartbond_isr_trigger()
575 * Each sub-transfer in the descriptor list should be exercised in spi_smartbond_isr_trigger()
577 * non-zero length. in spi_smartbond_isr_trigger()
579 data->rx_len = spi_context_max_continuous_chunk(ctx); in spi_smartbond_isr_trigger()
580 data->tx_len = data->rx_len; in spi_smartbond_isr_trigger()
599 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_transceive_async()
600 struct spi_smartbond_data *data = dev->data; in spi_smartbond_transceive_async()
601 struct spi_context *ctx = &data->ctx; in spi_smartbond_transceive_async()
609 spi_context_buffers_setup(ctx, tx_bufs, rx_bufs, data->dfs); in spi_smartbond_transceive_async()
614 * are exercised along with de-asserting the #CS line. in spi_smartbond_transceive_async()
633 struct spi_smartbond_data *data = dev->data; in spi_smartbond_isr()
634 struct spi_context *ctx = &data->ctx; in spi_smartbond_isr()
636 switch (data->transfer_mode) { in spi_smartbond_isr()
644 /* Exersice the type of the next sub-transfer */ in spi_smartbond_isr()
645 if (!data->rx_len && !data->tx_len) { in spi_smartbond_isr()
648 if (data->transfer_mode == SPI_SMARTBOND_TRANSFER_RX_ONLY) { in spi_smartbond_isr()
649 data->tx_len = spi_context_total_rx_len(ctx) - data->transferred; in spi_smartbond_isr()
651 data->transferred = 0; in spi_smartbond_isr()
653 } else if (data->transfer_mode == SPI_SMARTBOND_TRANSFER_TX_ONLY) { in spi_smartbond_isr()
655 } else if (data->transfer_mode == SPI_SMARTBOND_TRANSFER_TX_RX) { in spi_smartbond_isr()
656 data->rx_len = spi_context_max_continuous_chunk(ctx); in spi_smartbond_isr()
657 data->tx_len = data->rx_len; in spi_smartbond_isr()
690 * with NULL pointer and non-zero length. In such a case, data will be
707 struct spi_smartbond_data *data = dev->data; in spi_smartbond_dma_tx_channel_request()
708 const struct spi_smartbond_cfg *config = dev->config; in spi_smartbond_dma_tx_channel_request()
710 if (!atomic_test_and_set_bit(data->dma_channel_atomic_flag, in spi_smartbond_dma_tx_channel_request()
712 if (dma_request_channel(config->tx_dma_ctrl, (void *)&config->tx_dma_chan) < 0) { in spi_smartbond_dma_tx_channel_request()
713 atomic_clear_bit(data->dma_channel_atomic_flag, in spi_smartbond_dma_tx_channel_request()
715 return -EIO; in spi_smartbond_dma_tx_channel_request()
725 struct spi_smartbond_data *data = dev->data; in spi_smartbond_dma_tx_channel_release()
726 const struct spi_smartbond_cfg *config = dev->config; in spi_smartbond_dma_tx_channel_release()
728 if (atomic_test_and_clear_bit(data->dma_channel_atomic_flag, in spi_smartbond_dma_tx_channel_release()
730 dma_release_channel(config->tx_dma_ctrl, config->tx_dma_chan); in spi_smartbond_dma_tx_channel_release()
737 struct spi_smartbond_data *data = dev->data; in spi_smartbond_dma_rx_channel_request()
738 const struct spi_smartbond_cfg *config = dev->config; in spi_smartbond_dma_rx_channel_request()
740 if (!atomic_test_and_set_bit(data->dma_channel_atomic_flag, in spi_smartbond_dma_rx_channel_request()
742 if (dma_request_channel(config->rx_dma_ctrl, (void *)&config->rx_dma_chan) < 0) { in spi_smartbond_dma_rx_channel_request()
743 atomic_clear_bit(data->dma_channel_atomic_flag, in spi_smartbond_dma_rx_channel_request()
745 return -EIO; in spi_smartbond_dma_rx_channel_request()
755 struct spi_smartbond_data *data = dev->data; in spi_smartbond_dma_rx_channel_release()
756 const struct spi_smartbond_cfg *config = dev->config; in spi_smartbond_dma_rx_channel_release()
758 if (atomic_test_and_clear_bit(data->dma_channel_atomic_flag, in spi_smartbond_dma_rx_channel_release()
760 dma_release_channel(config->rx_dma_ctrl, config->rx_dma_chan); in spi_smartbond_dma_rx_channel_release()
769 struct spi_smartbond_data *data = dev->data; in spi_smartbond_tx_dma_cb()
770 struct spi_context *ctx = &data->ctx; in spi_smartbond_tx_dma_cb()
776 spi_context_update_tx(ctx, data->dfs, data->tx_len); in spi_smartbond_tx_dma_cb()
777 k_sem_give(&data->tx_dma_sync); in spi_smartbond_tx_dma_cb()
784 struct spi_smartbond_data *data = dev->data; in spi_smartbond_rx_dma_cb()
785 struct spi_context *ctx = &data->ctx; in spi_smartbond_rx_dma_cb()
791 spi_context_update_rx(ctx, data->dfs, data->rx_len); in spi_smartbond_rx_dma_cb()
792 k_sem_give(&data->rx_dma_sync); in spi_smartbond_rx_dma_cb()
798 const struct spi_smartbond_cfg *config = dev->config; in spi_smartbond_dma_deconfig()
800 if (config->rx_dma_ctrl && config->tx_dma_ctrl) { in spi_smartbond_dma_deconfig()
801 dma_stop(config->rx_dma_ctrl, config->rx_dma_chan); in spi_smartbond_dma_deconfig()
802 dma_stop(config->tx_dma_ctrl, config->tx_dma_chan); in spi_smartbond_dma_deconfig()
812 struct spi_smartbond_data *data = dev->data; in spi_smartbond_dma_config()
813 const struct spi_smartbond_cfg *config = dev->config; in spi_smartbond_dma_config()
814 struct dma_config *tx = &data->tx_dma_cfg; in spi_smartbond_dma_config()
815 struct dma_config *rx = &data->rx_dma_cfg; in spi_smartbond_dma_config()
816 struct dma_block_config *tx_block = &data->tx_dma_block_cfg; in spi_smartbond_dma_config()
817 struct dma_block_config *rx_block = &data->rx_dma_block_cfg; in spi_smartbond_dma_config()
824 if (!(config->tx_dma_chan & 0x1) || in spi_smartbond_dma_config()
825 (config->rx_dma_chan & 0x1) || in spi_smartbond_dma_config()
826 (config->tx_dma_chan != (config->rx_dma_chan + 1))) { in spi_smartbond_dma_config()
828 return -EINVAL; in spi_smartbond_dma_config()
831 if (config->tx_slot_mux != config->rx_slot_mux) { in spi_smartbond_dma_config()
833 return -EINVAL; in spi_smartbond_dma_config()
836 if (!device_is_ready(config->tx_dma_ctrl) || in spi_smartbond_dma_config()
837 !device_is_ready(config->rx_dma_ctrl)) { in spi_smartbond_dma_config()
839 return -ENODEV; in spi_smartbond_dma_config()
844 return -EIO; in spi_smartbond_dma_config()
849 return -EIO; in spi_smartbond_dma_config()
852 tx->channel_direction = MEMORY_TO_PERIPHERAL; in spi_smartbond_dma_config()
853 tx->dma_callback = spi_smartbond_tx_dma_cb; in spi_smartbond_dma_config()
854 tx->user_data = (void *)dev; in spi_smartbond_dma_config()
855 tx->block_count = 1; in spi_smartbond_dma_config()
856 tx->head_block = &data->tx_dma_block_cfg; in spi_smartbond_dma_config()
857 tx->error_callback_dis = 1; in spi_smartbond_dma_config()
858 tx->dma_slot = config->tx_slot_mux; in spi_smartbond_dma_config()
859 tx->channel_priority = 2; in spi_smartbond_dma_config()
862 tx->source_burst_length = 1; in spi_smartbond_dma_config()
863 tx->dest_burst_length = 1; in spi_smartbond_dma_config()
865 tx->source_data_size = 0; in spi_smartbond_dma_config()
866 tx->dest_data_size = 0; in spi_smartbond_dma_config()
869 tx_block->dest_addr_adj = 0x2; in spi_smartbond_dma_config()
871 tx_block->source_addr_adj = 0x0; in spi_smartbond_dma_config()
872 tx_block->dest_address = (uint32_t)&config->regs->SPI_RX_TX_REG; in spi_smartbond_dma_config()
878 tx_block->block_size = 0; in spi_smartbond_dma_config()
880 tx_block->source_address = 0; in spi_smartbond_dma_config()
882 rx->channel_direction = PERIPHERAL_TO_MEMORY; in spi_smartbond_dma_config()
883 rx->dma_callback = spi_smartbond_rx_dma_cb; in spi_smartbond_dma_config()
884 rx->user_data = (void *)dev; in spi_smartbond_dma_config()
885 rx->block_count = 1; in spi_smartbond_dma_config()
886 rx->head_block = &data->rx_dma_block_cfg; in spi_smartbond_dma_config()
887 rx->error_callback_dis = 1; in spi_smartbond_dma_config()
888 rx->dma_slot = config->rx_slot_mux; in spi_smartbond_dma_config()
889 rx->channel_priority = 2; in spi_smartbond_dma_config()
892 rx->source_burst_length = 1; in spi_smartbond_dma_config()
893 rx->dest_burst_length = 1; in spi_smartbond_dma_config()
895 rx->source_data_size = 0; in spi_smartbond_dma_config()
896 rx->dest_data_size = 0; in spi_smartbond_dma_config()
899 rx_block->source_addr_adj = 0x2; in spi_smartbond_dma_config()
901 rx_block->dest_addr_adj = 0x0; in spi_smartbond_dma_config()
902 rx_block->source_address = (uint32_t)&config->regs->SPI_RX_TX_REG; in spi_smartbond_dma_config()
908 rx_block->block_size = 0; in spi_smartbond_dma_config()
910 rx_block->dest_address = 0; in spi_smartbond_dma_config()
917 struct spi_smartbond_data *data = dev->data; in spi_smartbond_dma_trigger()
918 const struct spi_smartbond_cfg *config = dev->config; in spi_smartbond_dma_trigger()
919 struct spi_context *ctx = &data->ctx; in spi_smartbond_dma_trigger()
920 struct dma_config *tx = &data->tx_dma_cfg; in spi_smartbond_dma_trigger()
921 struct dma_config *rx = &data->rx_dma_cfg; in spi_smartbond_dma_trigger()
922 struct dma_block_config *tx_block = &data->tx_dma_block_cfg; in spi_smartbond_dma_trigger()
923 struct dma_block_config *rx_block = &data->rx_dma_block_cfg; in spi_smartbond_dma_trigger()
925 rx->source_data_size = data->dfs; in spi_smartbond_dma_trigger()
926 rx->dest_data_size = data->dfs; in spi_smartbond_dma_trigger()
927 tx->source_data_size = data->dfs; in spi_smartbond_dma_trigger()
928 tx->dest_data_size = data->dfs; in spi_smartbond_dma_trigger()
930 data->transfer_mode = spi_smartbond_transfer_mode_get(dev); in spi_smartbond_dma_trigger()
932 switch (data->transfer_mode) { in spi_smartbond_dma_trigger()
936 data->rx_len = spi_context_max_continuous_chunk(ctx); in spi_smartbond_dma_trigger()
937 data->tx_len = data->rx_len; in spi_smartbond_dma_trigger()
939 rx_block->block_size = data->rx_len * data->dfs; in spi_smartbond_dma_trigger()
940 tx_block->block_size = rx_block->block_size; in spi_smartbond_dma_trigger()
942 rx_block->dest_address = (uint32_t)ctx->rx_buf; in spi_smartbond_dma_trigger()
943 rx_block->dest_addr_adj = 0x0; in spi_smartbond_dma_trigger()
944 tx_block->source_address = (uint32_t)&spi_smartbond_read_dummy_buf; in spi_smartbond_dma_trigger()
945 /* Non-incremental */ in spi_smartbond_dma_trigger()
946 tx_block->source_addr_adj = 0x2; in spi_smartbond_dma_trigger()
948 if (dma_config(config->tx_dma_ctrl, config->tx_dma_chan, tx) < 0) { in spi_smartbond_dma_trigger()
950 return -EINVAL; in spi_smartbond_dma_trigger()
952 if (dma_config(config->rx_dma_ctrl, config->rx_dma_chan, rx) < 0) { in spi_smartbond_dma_trigger()
954 return -EINVAL; in spi_smartbond_dma_trigger()
956 dma_start(config->rx_dma_ctrl, config->rx_dma_chan); in spi_smartbond_dma_trigger()
957 dma_start(config->tx_dma_ctrl, config->tx_dma_chan); in spi_smartbond_dma_trigger()
960 k_sem_take(&data->tx_dma_sync, K_FOREVER); in spi_smartbond_dma_trigger()
961 k_sem_take(&data->rx_dma_sync, K_FOREVER); in spi_smartbond_dma_trigger()
966 data->tx_len = spi_context_max_continuous_chunk(ctx); in spi_smartbond_dma_trigger()
967 data->rx_len = data->tx_len; in spi_smartbond_dma_trigger()
969 tx_block->block_size = data->tx_len * data->dfs; in spi_smartbond_dma_trigger()
970 tx_block->source_address = (uint32_t)ctx->tx_buf; in spi_smartbond_dma_trigger()
971 tx_block->source_addr_adj = 0x0; in spi_smartbond_dma_trigger()
973 if (dma_config(config->tx_dma_ctrl, config->tx_dma_chan, tx) < 0) { in spi_smartbond_dma_trigger()
975 return -EINVAL; in spi_smartbond_dma_trigger()
977 dma_start(config->tx_dma_ctrl, config->tx_dma_chan); in spi_smartbond_dma_trigger()
980 k_sem_take(&data->tx_dma_sync, K_FOREVER); in spi_smartbond_dma_trigger()
985 data->rx_len = spi_context_max_continuous_chunk(ctx); in spi_smartbond_dma_trigger()
986 data->tx_len = data->rx_len; in spi_smartbond_dma_trigger()
991 tx_block->block_size = data->tx_len * data->dfs; in spi_smartbond_dma_trigger()
992 rx_block->block_size = tx_block->block_size; in spi_smartbond_dma_trigger()
994 if (ctx->tx_buf) { in spi_smartbond_dma_trigger()
995 tx_block->source_address = (uint32_t)ctx->tx_buf; in spi_smartbond_dma_trigger()
996 tx_block->source_addr_adj = 0x0; in spi_smartbond_dma_trigger()
998 tx_block->source_address = (uint32_t)&spi_smartbond_read_dummy_buf; in spi_smartbond_dma_trigger()
999 tx_block->source_addr_adj = 0x2; in spi_smartbond_dma_trigger()
1002 if (ctx->rx_buf) { in spi_smartbond_dma_trigger()
1003 rx_block->dest_address = (uint32_t)ctx->rx_buf; in spi_smartbond_dma_trigger()
1004 rx_block->dest_addr_adj = 0x0; in spi_smartbond_dma_trigger()
1006 rx_block->dest_address = (uint32_t)&spi_smartbond_read_dummy_buf; in spi_smartbond_dma_trigger()
1007 rx_block->dest_addr_adj = 0x2; in spi_smartbond_dma_trigger()
1010 if (dma_config(config->tx_dma_ctrl, config->tx_dma_chan, tx) < 0) { in spi_smartbond_dma_trigger()
1012 return -EINVAL; in spi_smartbond_dma_trigger()
1014 if (dma_config(config->rx_dma_ctrl, config->rx_dma_chan, rx) < 0) { in spi_smartbond_dma_trigger()
1016 return -EINVAL; in spi_smartbond_dma_trigger()
1018 dma_start(config->rx_dma_ctrl, config->rx_dma_chan); in spi_smartbond_dma_trigger()
1019 dma_start(config->tx_dma_ctrl, config->tx_dma_chan); in spi_smartbond_dma_trigger()
1021 k_sem_take(&data->tx_dma_sync, K_FOREVER); in spi_smartbond_dma_trigger()
1022 k_sem_take(&data->rx_dma_sync, K_FOREVER); in spi_smartbond_dma_trigger()
1030 if (!ctx->rx_buf) { in spi_smartbond_dma_trigger()
1042 } while (data->transfer_mode != SPI_SMARTBOND_TRANSFER_NONE); in spi_smartbond_dma_trigger()
1052 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_transceive()
1053 struct spi_smartbond_data *data = dev->data; in spi_smartbond_transceive()
1054 struct spi_context *ctx = &data->ctx; in spi_smartbond_transceive()
1057 spi_context_lock(&data->ctx, false, NULL, NULL, spi_cfg); in spi_smartbond_transceive()
1062 spi_context_buffers_setup(ctx, tx_bufs, rx_bufs, data->dfs); in spi_smartbond_transceive()
1073 spi_context_update_tx(ctx, data->dfs, 1); in spi_smartbond_transceive()
1078 while (!(cfg->regs->SPI_CTRL_REG & SPI_SPI_CTRL_REG_SPI_INT_BIT_Msk)) { in spi_smartbond_transceive()
1082 spi_context_update_rx(ctx, data->dfs, 1); in spi_smartbond_transceive()
1086 * It might happen that a NULL buffer with a non-zero length in spi_smartbond_transceive()
1089 if (ctx->rx_len) { in spi_smartbond_transceive()
1090 spi_context_update_rx(ctx, data->dfs, 1); in spi_smartbond_transceive()
1093 cfg->regs->SPI_CLEAR_INT_REG = 1UL; in spi_smartbond_transceive()
1099 spi_context_release(&data->ctx, rc); in spi_smartbond_transceive()
1108 struct spi_smartbond_data *data = dev->data; in spi_smartbond_release()
1109 struct spi_context *ctx = &data->ctx; in spi_smartbond_release()
1113 return -EINVAL; in spi_smartbond_release()
1134 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_resume()
1135 struct spi_smartbond_data *data = dev->data; in spi_smartbond_resume()
1138 CRG_COM->RESET_CLK_COM_REG = cfg->periph_clock_config << 1; in spi_smartbond_resume()
1139 CRG_COM->SET_CLK_COM_REG = cfg->periph_clock_config; in spi_smartbond_resume()
1141 rc = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT); in spi_smartbond_resume()
1147 rc = spi_context_cs_configure_all(&data->ctx); in spi_smartbond_resume()
1161 spi_context_unlock_unconditionally(&data->ctx); in spi_smartbond_resume()
1170 const struct spi_smartbond_cfg *config = dev->config; in spi_smartbond_suspend()
1171 struct spi_smartbond_data *data = dev->data; in spi_smartbond_suspend()
1173 data->spi_ctrl_reg = config->regs->SPI_CTRL_REG; in spi_smartbond_suspend()
1175 config->regs->SPI_CTRL_REG &= ~SPI_SPI_CTRL_REG_SPI_EN_CTRL_Msk; in spi_smartbond_suspend()
1177 CRG_COM->RESET_CLK_COM_REG = config->periph_clock_config; in spi_smartbond_suspend()
1179 ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_SLEEP); in spi_smartbond_suspend()
1181 LOG_WRN("Failed to configure the SPI pins to inactive state"); in spi_smartbond_suspend()
1206 ret = -ENOTSUP; in spi_smartbond_pm_action()
1226 const struct spi_smartbond_cfg *cfg = dev->config; in spi_smartbond_isr_connect()
1228 switch ((uint32_t)cfg->regs) { in spi_smartbond_isr_connect()
1238 return -EINVAL; in spi_smartbond_isr_connect()
1248 struct spi_smartbond_data *data = dev->data; in spi_smartbond_init()
1251 data->transfer_mode = SPI_SMARTBOND_TRANSFER_NONE; in spi_smartbond_init()
1254 k_sem_init(&data->tx_dma_sync, 0, 1); in spi_smartbond_init()
1255 k_sem_init(&data->rx_dma_sync, 0, 1); in spi_smartbond_init()
1268 spi_context_unlock_unconditionally(&data->ctx); in spi_smartbond_init()